IP Library Granted Patent US 7,485,482
Granted Patent B2
US 7,485,482 · App. 11/401,329 · Granted Feb 3, 2009

Method for manufacturing vertical group III-nitride light emitting device

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Quick Facts
Patent No.
US 7,485,482
App. No.
11/401,329
Granted
Feb 3, 2009
Kind
B2
Abstract

The invention provides a vertical group III-nitride light emitting device improved in external extraction efficiency and a method for manufacturing the same. The method includes forming an undoped GaN layer and an insulating layer on a basic substrate. Then, the insulating layer is selectively etched to form an insulating pattern, and an n-doped Al x Ga y In (1-x-y) N layer, an active layer and a p-doped Al m Ga n In (1-m-n) N layer are sequentially formed on the insulating pattern. A conductive substrate is formed on the p-doped Al m Ga n In (1-m-n) N layer. The basic substrate, the undoped gaN layer and the insulating pattern are removed, and an n-electrode is formed on a part of the exposed surface of the n-doped Al x Ga y In (1-x-y) N layer.

Claims (29)

1. A method for manufacturing a vertical group III-nitride light emitting device comprising steps of:

(i) forming an undoped GaN layer and an insulating layer sequentially on a basic substrate;

(ii) selectively etching the insulating layer to form an insulating pattern on the undoped GaN layer;

(iii) sequentially forming an n-doped Al x Ga y In (1-x-y) N layer, where 0≦x≦1, 0≦y≦1, 0≦x+y≦1, an active layer and a p-doped Al m Ga n In (1-m-n) N layer, where 0≦m≦1, 0≦n≦1, 0≦m+n≦1 on the insulating pattern;

(iv) forming a conductive substrate on the p-doped Al m Ga n In (1-m-n) N layer;

(v) removing the basic substrate, the undoped GaN layer and the insulating pattern to expose a rough pattern on the n-doped Al x Ga y In (1-x-y) N layer; and

(vi) forming an n-electrode on a part of the exposed surface of the n-doped Al x Ga y In (1-x-y) N layer.

2. The method according to claim 1 , wherein the insulating layer comprises a silicon oxide film or silicon nitride film.

3. The method according to claim 1 , wherein the step (v) comprises:

separating or removing the basic substrate using a laser lift-off process;

removing the undoped GaN layer using dry etching or chemical mechanical polishing (CMP); and

removing the insulating pattern using wet etching.

4. The method according to claim 1 , wherein the n-doped Al x Ga y In (1-x-y) N layer is formed by growing n-doped Al x Ga y In (1-x-y) N via epitaxial lateral overgrowth.

5. The method according to claim 1 , further comprising:

forming a low-temperature GaN buffer layer on the basic substrate before the step (i).

6. The method according to claim 1 , wherein in the step (ii), the insulating pattern is not formed on a top surface area of the undoped GaN layer corresponding to the n-electrode.

7. The method according to claim 1 , wherein the conductive substrate comprises a silicon substrate or a metal substrate.

8. The method according to claim 1 , wherein the step (iv) comprises plating a metal layer on the p-doped Al m Ga n In (1-m-n) N layer.

9. The method according to claim 8 , wherein the metal layer comprises one selected from a group consisting of tungsten, copper, nickel, titan and alloys of at least two thereof.

10. The method according to claim 1 , wherein the step (iv) comprises preparing a preliminary conductive substrate beforehand and bonding the prepared preliminary conductive substrate on the p-doped Al m Ga n In (1-m-n) N layer using a conductive adhesive layer.

11. The method according to claim 10 , wherein the conductive adhesive layer comprises material selected from a group consisting of Au, Au—Sn, Sn, In, Au—Ag and Pb—Sn.

12. The method according to claim 1 , further comprising:

forming a reflective layer on the p-doped Al m Ga n In (1-m-n) N layer between the step (iii) and the step (iv).

13. The method according to claim 12 , wherein the reflective layer comprises one selected from a group consisting of a CuInO 2 /Ag layer, a CuInO 2 /Al layer and an Ni/Ag/Pt layer.

14. The method according to claim 1 , further comprising forming a transparent electrode layer on the n-doped Al x Ga y In (1-x-y) N layer after the step (v).

15. The method according to claim 1 , wherein the rough pattern formed on the n-doped Al x Ga y In (1-x-y) N layer comprises convexes or concaves which are spaced from each other in the range of 20 nm to 100 μm and have a width and a height of 20 nm to 100 μm.

16. The method according to claim 1 , wherein the rough pattern formed on the n-doped Al x Ga y In (1-x-y) N layer comprises convexes or concaves which are spaced from each other in the range of 200 nm to 3 μm and have a width and a height of 200 nm to 3 μm.

17. The method according to claim 1 , wherein the rough pattern formed on the n-doped Al x Ga y In (1-x-y) N layer comprises a photonic crystal.

18. The method according to claim 1 , wherein the basic substrate comprises a sapphire substrate.

Assignments (3)
MERGER Recorded Aug 7, 2012
From: SAMSUNG LED CO., LTD.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 028744/0272 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2010
From: SAMSUNG ELECTRO-MECHANICS CO., LTD.
To: SAMSUNG LED CO., LTD.
Reel/Frame 024723/0532 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2006
From: LEE, JAE HOON; KIM, YONG CHUN; BACK, HYUNG KY; KONG, MOON HEON; KIM, DONG WOO
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 017778/0824 →