IP Library Granted Patent US 7,384,834
Granted Patent B2
US 7,384,834 · App. 11/411,892 · Granted Jun 10, 2008

Semiconductor device and a method of manufacturing the same

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Quick Facts
Patent No.
US 7,384,834
App. No.
11/411,892
Granted
Jun 10, 2008
Kind
B2
Abstract

A semiconductor device and a method of manufacturing such a semiconductor device having a field effect transistor with improved current driving performance (e.g., an increase of drain current) of the field effect transistor comprising the steps of ion implanting an element from the main surface to the inside of a silicon layer as a semiconductor substrate to a level shallower than the implantation depth of the impurities in the step of forming the semiconductor region before the step of ion implanting impurities from the main surface to the inside of the silicon layer as a semiconductor substrate to form the semiconductor region being aligned with the gate electrode.

Claims (36)

1. A method of manufacturing a semiconductor device including a field effect transistor comprising the steps of:

forming a semiconductor film on a main surface of a semiconductor substrate;

ion implanting impurities for reducing a resistance value to the semiconductor film;

patterning the semiconductor film to form a gate electrode; and,

ion implanting an element of a group identical with that of the semiconductor film to the semiconductor film.

2. A method of manufacturing a semiconductor device according to claim 1 , further comprising a step of:

activating the impurities by a heat treatment after the step of ion implanting the impurities,

wherein the step of ion implanting the element of the group identical with that of the semiconductor film is conducted before the step of activating the impurities by the heat treatment.

3. A method of manufacturing a semiconductor device according to claim 1 , further comprising a step of:

activating the impurities by a heat treatment after the step of ion implanting the impurities,

wherein the step of ion implanting the element of the group identical with that of the semiconductor film is conducted before the step of ion implanting the impurities.

4. A method of manufacturing a semiconductor device according to claim 1 ,

wherein the semiconductor film is comprised of silicon and the element is comprised of Ge ions.

5. A method of manufacturing a semiconductor device according to claim 1 , further comprising the steps of:

ion implanting the element to the region aligned with the gate electrode of the main surface of the semiconductor substrate; and

ion implanting the impurities to the region aligned with the gate electrode,

wherein the acceleration energy for the element upon ion implantation to the semiconductor film is higher than the acceleration energy for the element upon ion implantation to the region aligned with the gate electrode.

6. A method of manufacturing a semiconductor device according to claim 1 , further comprising a step of:

ion implanting the element to the region aligned with the gate electrode of the main surface of the semiconductor substrate; and

ion implanting impurities to the region aligned with the gate electrode,

wherein the amount of dose of the element upon ion implantation to the semiconductor film is larger than the amount of dose of the element upon ion implantation to the region aligned with the gate electrode.

7. A method of manufacturing a semiconductor device including an n-channel conductivity type field effect transistor formed in a first region of a main surface of a semiconductor substrate and a p-channel conductivity type field effect transistor formed in a second region different from the first region of the main surface of the semiconductor substrate, the method comprising the steps of:

forming a semiconductor film on the first and the second regions of the main surface of the semiconductor substrate;

ion implanting impurities for reducing a resistance value to the semiconductor film;

patterning the semiconductor film to form gate electrodes respectively at the first and the second regions of the main surface of the semiconductor substrate;

activating the impurities by a heat treatment; and,

ion implanting an element of a group identical with that of the semiconductor film to the semiconductor film after the step of forming the semiconductor film and before the step of activating the impurities by a heat treatment.

8. A method of manufacturing a semiconductor device including a field effect transistor comprising the steps of:

forming a gate electrode by way of a gate insulating film above a main surface of a semiconductor substrate;

ion implanting impurities from the main surface of the semiconductor substrate to the inside thereof to form a semiconductor region being aligned with the gate electrode;

ion implanting an element of a group identical with that of the semiconductor substrate from the main surface to the inside of the semiconductor substrate to a level shallower than an implantation depth of the impurities in the step of forming a first semiconductor region, after the step of forming the gate electrode; and

applying cleaning to the semiconductor substrate after the step of ion implanting the element of the identical group and after forming the semiconductor region,

wherein the cleaning step is conducted by using aqueous sulfuric acid concentration, diluted hydrofluoric acid and aqueous hydrogen chloride solution.

9. A method of manufacturing a semiconductor device according claim 8 , further comprising a step of:

activating the ion implanted impurities in the step of forming the semiconductor region by a heat treatment after the step of ion implanting the element of the identical group and the step of forming the semiconductor region,

wherein the cleaning is conducted after the step of activating the impurities by the heat treatment.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2014
From: RENESAS ELECTRONICS CORPORATION
To: TESSERA ADVANCED TECHNOLOGIES, INC.
Reel/Frame 032892/0212 →