Resistive memory cell array with common plate
In the present method of changing the state of a resistive memory device which is capable of adopting an erased, relatively higher resistance state and a programmed, relatively lower resistance state, the resistive memory device having first and second electrodes and an active layer between the first and second electrodes, an electrical potential is applied across the electrodes and current through the resistive memory device is limited by means of a first current limiting structure to change the resistive memory device from the erased, higher resistance state to the programmed, lower resistance state. Furthermore, an electrical potential is applied across the electrodes and current through the resistive memory device is limited by means of a second current limiting structure to change the resistive memory device from the programmed, lower resistance state to the erased, higher resistance state.
1. A method of changing the state of a resistive memory device which is capable of adopting relatively higher and lower resistance states, the resistive memory device comprising first and second electrodes and an active layer between the first and second electrodes, the method comprising applying an electrical potential across the electrodes from higher to lower potential in a direction from one electrode to the other to change the state of the resistive memory device from one state to the other, said direction being the same as that in which said electrical potential would be applied across the electrodes to change the state of the resistive memory device from said other state to said one state.
2. The method of claim 1 wherein the active layer is on and in contact with the first electrode, and the second electrode is on and in contact with the active layer.
3. The method of claim 1 wherein the active layer comprises metal oxide.
4. The method of claim 1 wherein the active layer is selected from the group consisting of nickel oxide, copper oxide, titanium oxide, tantalum oxide, aluminum-tantalum oxide, strontium-tantalum oxide, zirconium oxide, and cobalt oxide.
5. The method of claim 1 wherein the method further comprises selecting a level of current limit through the resistive memory device.
6. The method of claim 5 and further comprising the step of limiting current through the resistive memory device to the selected level.
7. The method of claim 1 wherein the higher resistance state is an erased state and the lower resistance state is a programmed state.
8. A method of changing the state of a resistive memory device from a programmed, relatively lower resistance state to an erased, relatively higher resistance state, the resistive memory device comprising first and second electrodes and an active layer between the first and second electrodes, the method comprising applying an electrical potential across the electrodes from higher to lower potential in a direction from one electrode to the other to change the state of the resistive memory device from the programmed, lower resistance state to the erased, higher resistance state, said direction being the same as that in which said electrical potential would be applied across the electrodes to change the state of the resistive memory device from the erased, higher resistance state to the programmed, lower resistance state.
9. The method of claim 8 and further comprising selecting a level of current limit through the resistive memory device.
10. The method of claim 9 and further comprising the step of limiting current through the resistive memory device to the selected level.
11. A method of changing the state of a resistive memory device from an erased, relatively higher resistance state to a programmed, relatively lower resistance state, the resistive memory device comprising first and second electrodes and an active layer between the first and second electrodes, the method comprising applying an electrical potential across the electrodes from higher to lower potential in a direction from one electrode to the other to change the state of the resistive memory device from the erased, higher resistance state to the programmed, lower resistance state, said direction being the same as that in which said electrical potential would be applied across the electrodes to change the state of the resistive memory device from the programmed, lower resistance state to the erased, higher resistance state.
12. The method of claim 1 and further comprising selecting a level of current limit through the resistive memory device.
13. The method of claim 12 and further comprising limiting current through the resistive memory device to the selected level.
14. A method of changing the state of a resistive memory device which is capable of adopting an erased, relatively higher resistance state and a programmed, relatively lower resistance state, the resistive memory device comprising first and second electrodes and an active layer between the first and second electrodes, the method comprising applying an electrical potential across the electrodes from higher to lower potential in a direction from the first electrode to the second electrode to change the state of the resistive memory device from the erased, higher resistance state to the programmed, lower resistance state, and applying an electrical potential across the electrodes from higher to lower potential in a direction from the first electrode to the second electrode to change the state of the resistive memory device from programmed, lower resistance state to the erased, higher resistance state.
15. The method of claim 14 and further comprising selecting a level of current limit through the resistive memory device.
16. The method of claim 15 and further comprising limiting current through the resistive memory device to the selected level.
17. A method of changing the state of a resistive memory device which is capable of adopting an erased, relatively higher resistance state and a programmed, relatively lower resistance state, the resistive memory device comprising first and second electrodes and an active layer between the first and second electrodes, the method comprising applying an electrical potential across the electrodes and limiting current through the resistive memory device by means of a first current limiting structure to change the resistive memory device from the erased, higher resistance state to the programmed, lower resistance state, and applying an electrical potential across the electrodes and limiting current through the resistive memory device by means of a second current limiting structure to change the resistive memory device from the programmed, lower resistance state to the erased, higher resistance state.
18. The method of claim 17 wherein the current determined by the first current limiting structure is different from the current determined by the second current limiting structure.
19. The method of claim 18 wherein the current determined by the first current limiting structure is lower than the current determined by the second current limiting structure.