IP Library Granted Patent US 7,930,691
Granted Patent B2
US 7,930,691 · App. 11/412,762 · Granted Apr 19, 2011

Methods and apparatus for updating data structures during in-service upgrade of software in network processor

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Quick Facts
Patent No.
US 7,930,691
App. No.
11/412,762
Granted
Apr 19, 2011
Kind
B2
Abstract

Improved techniques are disclosed for performing an in-service upgrade of software associated with a network or packet processor. By way of example, a method of managing data structures associated with code executable on a packet processor includes the following steps. Data structures in the code are identified as being one of static data structures and non-static data structures, wherein a static data structure includes a data structure that is not changed during execution of the packet processor code and a non-static data structure includes a data structure that is changed during execution of the packet processor code. One or more data structures associated with the packet processor code are managed in a manner specific to the identification of the one or more data structures as static data structures or non-static data structures. At least a portion of the data structures may include tree structures.

Claims (32)

1. A method of managing data structures associated with code executable on a packet processor, comprising the steps of:

identifying data structures in the code as being one of static data structures and non-static data structures, wherein a static data structure comprises a data structure that is not changed during execution of the packet processor code and a non-static data structure comprises a data structure that is changed during execution of the packet processor code; and

managing one or more data structures associated with the packet processor code in a manner specific to the identification of the one or more data structures as static data structures or non-static data structures, wherein the manner in which the static data structures are managed differs from the manner in which the non-static data structures are managed;

wherein at least a portion of the data structures comprise tree structures;

wherein the managing step comprises updating the one or more tree structures associated with the packet processor code in a manner specific to the identification of the one or more tree structures as static tree structures or non-static tree structures, wherein the manner in which the static data structures are updated differs from the manner in which the non-static data structures are updated; and

wherein the step of updating the one or more tree structures comprises updating the one or more tree structures in accordance with a multi-staged upgrade process;

wherein the multi-staged upgrade process comprises a preparation stage, an update stage and a cleanup stage;

wherein the preparation stage for a non-static tree structure comprises allocating an indirection address for a flow function referenced by the non-static tree; and

wherein the indirection address for the flow function points to an address of the flow function in a current version of the packet processor code, and wherein the preparation stage for a non-static tree further comprises modifying one or more references to the flow function to point to the indirection address for the flow function.

2. The method of claim 1 , wherein the preparation stage for a static tree structure comprises building a new tree structure.

3. The method of claim 2 , wherein the preparation stage for a static tree structure further comprises generating and storing one or more write operations for use in accessing the new tree structure, wherein the one or more write operations are operative to modify a root address to point to the new tree structure.

4. The method of claim 3 , wherein the update stage for a static tree structure comprises propagating the one or more write operations to the packet processor.

5. The method of claim 4 , wherein the cleanup stage for a static tree structure comprises reclaiming one or more memory locations available after the update stage.

6. The method of claim 1 , wherein the preparation stage for a non-static tree structure further comprises generating and storing one or more write operations for use in accessing the non-static tree structure in an updated version of the packet processor code, wherein the one or more write operations are operative to update the indirection address for the flow function to point to an address of the flow function in the updated version of the packet processor code.

7. The method of claim 6 , wherein the update stage for a non-static tree structure comprises propagating the one or more write operations to the packet processor.

8. The method of claim 7 , wherein the cleanup stage for a non-static tree structure comprises replacing the allocated indirection address with the address of the flow function in the updated version of the packet processor code.

9. A method of updating tree structures associated with code executable on a network processor, comprising the steps of:

identifying tree structures in the code as being one of static tree structures and non-static tree structures, wherein a static tree structure comprises a tree structure that is not changed during execution of the network processor code and a non-static tree structure comprises a tree structure that is changed during execution of the network processor code; and

upgrading one or more tree structures associated with the network processor code in a manner specific to the identification of the one or more tree structures as static tree structures or non-static tree structures, wherein the manner in which the static tree structures are upgraded differs from the manner in which the non-static tree structures are upgraded;

wherein the step of updating the one or more tree structures comprises updating the one or more tree structures in accordance with a multi-staged upgrade process;

wherein the multi-staged upgrade process comprises a preparation stage, an update stage and a cleanup stage;

wherein the preparation stage for a non-static tree structure comprises allocating an indirection address for a flow function referenced by the non-static tree; and

wherein the indirection address for the flow function points to an address of the flow function in a current version of the packet processor code, and wherein the preparation stage for a non-static tree further comprises modifying one or more references to the flow function to point to the indirection address for the flow function.

10. The method of claim 9 , wherein the code executable on the network processor comprises code for executing a packet classification function.

11. A network processor configured to have tree structures associated with code executable thereon updated by a process comprising the steps of:

identifying tree structures in the code as being one of static tree structures and non-static tree structures, wherein a static tree structure comprises a tree structure that is not changed during execution of the network processor code and a non-static tree structure comprises a tree structure that is changed during execution of the network processor code; and

upgrading one or more tree structures associated with the network processor code in a manner specific to the identification of the one or more tree structures as static tree structures or non-static tree structures, wherein the manner in which the static data structures are upgraded differs from the manner in which the non-static data structures are upgraded;

wherein the step of updating the one or more tree structures comprises updating the one or more tree structures in accordance with a multi-staged upgrade process;

wherein the multi-staged upgrade process comprises a preparation stage, an update stage and a cleanup stage;

wherein the preparation stage for a non-static tree structure comprises allocating an indirection address for a flow function referenced by the non-static tree; and

wherein the indirection address for the flow function points to an address of the flow function in a current version of the packet processor code, and wherein the preparation stage for a non-static tree further comprises modifying one or more references to the flow function to point to the indirection address for the flow function; and wherein the network processor comprises circuitry.

12. The network processor of claim 11 , wherein the network processor is implemented on an integrated circuit.

Assignments (7)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2015
From: LSI CORPORATION
To: INTEL CORPORATION
Reel/Frame 035090/0477 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS AT REEL/FRAME NO. 32856/0031 Recorded Nov 18, 2014
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 034286/0872 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2014
From: AGERE SYSTEMS LLC
To: LSI CORPORATION
Reel/Frame 034245/0655 →
CERTIFICATE OF CONVERSION Recorded Oct 19, 2014
From: AGERE SYSTEMS INC.
To: AGERE SYSTEMS LLC
Reel/Frame 034014/0846 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2006
From: BHATTACHARYA, RAJARSHI; SONNIER, DAVID P.; VANGATI, NARENDER REDDY
To: AGERE SYSTEMS INC.
Reel/Frame 017975/0126 →