Microelectronic devices, stacked microelectronic devices, and methods for manufacturing such devices
View Patent ↗Stacked microelectronic devices and methods for manufacturing such devices are disclosed herein. In one embodiment, a stacked microelectronic device assembly can include a first known good packaged microelectronic device including a first interposer substrate. A first die and a first through-casing interconnects are electrically coupled to the first interposer substrate. A first casing at least partially encapsulates the first device such that a portion of each first interconnect is accessible at a top portion of the first casing. A second known good packaged microelectronic device is coupled to the first device in a stacked configuration. The second device can include a second interposer substrate having a plurality of second interposer pads and a second die electrically coupled to the second interposer substrate. The exposed portions of the first interconnects are electrically coupled to corresponding second interposer pads.
1. A stacked microelectronic device assembly, comprising:
a first known good packaged microelectronic device including (a) a first interposer substrate with a plurality of first interposer contacts, (b) a first die carried by and electrically coupled to the first interposer substrate, wherein the first die includes an active side facing away from the first interposer substrate and a plurality of first terminals at the active side of the first die and electrically coupled to the first interposer substrate with a plurality of first wire bonds, (c) a first casing having a first face at the first interposer substrate and a second face opposite the first face such that the first casing completely encapsulates the first die and at least a portion of the first interposer substrate, and (d) a plurality of first through-casing interconnects at least partially encapsulated in the first casing and in contact with corresponding first interposer contacts, wherein the first interconnects extend from the first face to the second face; and
a second known good packaged microelectronic device coupled to the first device in a stacked configuration, the second device including (a) a second interposer substrate with a plurality of second interposer pads, (b) a second die carried by and electrically coupled to the second interposer substrate, wherein the second die includes an active side facing away from the second interposer substrate and a plurality of second terminals at the active side of the second die and electrically coupled to the second interposer substrate with a plurality of second wire bonds, and (c) a second casing that completely encapsulates the second die and at least a portion of the second interposer substrate, wherein the second interposer pads are in direct contact with and electrically coupled to exposed portions of the corresponding first interconnects at the second face of the first casing.
2. The assembly of claim 1 wherein:
the first interposer substrate includes a first side and a second side opposite the first side, the first interposer contacts being arranged in a desired pattern at the first side;
the first interconnects comprise a plurality of first conductive lead fingers attached to the first side of the first interposer substrate and projecting inwardly from a periphery of the first casing toward the first die, the first lead fingers being electrically coupled to corresponding first interposer contacts;
the second interposer substrate includes a first side, a second side opposite the first side, a plurality of second interposer contacts arranged in a desired pattern at the first side, and the second interposer pads arranged in a desired pattern at the second side; and
the assembly further comprises a plurality of second conductive lead fingers attached to the first side of the second interposer substrate and projecting inwardly from a periphery of the second casing toward the second die, the second lead fingers being electrically coupled to corresponding second interposer contacts.
3. The assembly of claim 2 wherein the individual first and second lead fingers each include:
a front portion facing toward the first and second die, respectively; and
a back portion opposite the front portion and generally aligned with the periphery of the first and second casing, respectively, such that at least a portion of each of the first and second lead fingers is accessible at the periphery of the first casing and the second casing, respectively.
4. The assembly of claim 1 wherein:
the first interposer substrate includes a first side and a second side opposite the first side, the first interposer contacts being arranged in a desired pattern at the first side;
the first terminals at the active side of the first die are electrically coupled to corresponding first interposer contacts with the plurality of first wire-bonds;
the second interposer substrate includes a first side, a second side opposite the first side, a plurality of second interposer contacts arranged in a desired pattern at the first side, and the second interposer pads arranged in a desired pattern at the second side; and
the second terminals at the active side of the second die are electrically coupled to corresponding second interposer contacts with the plurality of second wire-bonds.
5. The assembly of claim 1 wherein the first interposer substrate includes a first side, a second side opposite the first side, the first interposer contacts arranged in a desired pattern at the first side, and a plurality of first interposer pads at the second side arranged in a pattern corresponding to a standard JEDEC pinout.
6. The assembly of claim 5 , further comprising a plurality of electrical couplers attached to corresponding first interposer pads.
7. The assembly of claim 1 wherein:
the second interposer substrate includes a first side, a second side opposite the first side, a plurality of second interposer contacts arranged in a desired pattern at the first side, and the second interposer pads arranged in a desired pattern at the second side;
the second casing has a first face at the first side of the second interposer substrate and a second face opposite the first face;
the second device further comprises a plurality of second through-casing interconnects at least partially encapsulated in the second casing and in contact with corresponding second interposer contacts, the second interconnects extending from the first face of the second casing to the second face of the second casing; and
the assembly further comprises a third known good packaged microelectronic device coupled to the second device in a stacked configuration, the third device including (a) a third interposer substrate with a plurality of third interposer pads, (b) a third die carried by and electrically coupled to the third interposer substrate, and (c) a third casing that encapsulates the third die and at least a portion of the third interposer substrate, wherein the third interposer pads are electrically coupled to the exposed portions of the corresponding second interconnects at the second face of the second casing.
8. The assembly of claim 2 wherein:
the first lead fingers are in direct contact with corresponding first interposer contacts; and
the second lead fingers are in direct contact with corresponding second interposer contacts.
9. The assembly of claim 2 wherein the individual first and second lead fingers have the same or approximately the same height, and wherein the height of the first lead fingers and the second lead fingers is greater than a height of the first die and the second die, respectively.
10. The assembly of claim 1 wherein the first interconnects comprise a first lead frame, and wherein the second interconnects comprise a second lead frame, and wherein the individual lead frames are self-supporting structures including a plurality of lead fingers spaced apart from each other and projecting inwardly toward the respective first and second dies.
11. The assembly of claim 1 wherein:
the first interconnects are accessible at a periphery of the first casing; and
the second interconnects are accessible at a periphery of the second casing.