IP Library Granted Patent US 7,585,417
Granted Patent B2
US 7,585,417 · App. 11/426,018 · Granted Sep 8, 2009

Method of fabricating a diaphragm of a capacitive microphone device

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Quick Facts
Patent No.
US 7,585,417
App. No.
11/426,018
Granted
Sep 8, 2009
Kind
B2
Abstract

A method of fabricating a diaphragm of a capacitive microphone device is provided. First, a substrate is provided, and a dielectric layer is formed on a first surface of the substrate. Than, a plurality of silicon spacers are formed on a surface of the dielectric layer, and the dielectric layer is patterned to form a plurality of dielectric bumps. Subsequently, a diaphragm layer is formed on a surface of the silicon spacers, a surface of the dielectric bumps, and the first surface of the substrate so that the diaphragm layer has a corrugate structure by virtue of the dielectric bumps. Thereafter, a planarization layer is formed on the diaphragm layer, and a second surface of the substrate is etched to form a plurality of openings corresponding to the corrugate structure. Following that, the dielectric bumps exposed through the openings are removed, and the planarization layer is removed.

Claims (19)

1. A method of fabricating a diaphragm of a capacitive microphone device, comprising:

providing a substrate, and forming a dielectric layer on a first surface of the substrate;

forming a plurality of silicon spacers on a surface of the dielectric layer;

patterning the dielectric layer to form a plurality of dielectric bumps;

forming a diaphragm layer on a surface of the silicon spacers, a surface of the dielectric bumps, and the first surface of the substrate so that the diaphragm layer has a corrugate structure by virtue of the dielectric bumps;

forming a planarization layer on the diaphragm layer, and etching a second surface of the substrate to form a plurality of openings corresponding to the corrugate structure;

removing the dielectric bumps exposed through the openings; and

removing the planarization layer.

2. The method of claim 1 , wherein the dielectric layer comprises a silicon oxide layer.

3. The method of claim 1 , further comprising forming a plurality of vents in the diaphragm layer not corresponding to the dielectric bumps subsequent to forming the diaphragm layer.

4. The method of claim 1 , further comprising performing a thinning process on the second surface of the substrate prior to forming the openings.

5. The method of claim 1 , wherein forming the silicon spacers comprises:

depositing a silicon layer on the surface of the dielectric layer; and

etching a portion of the silicon layer and stopping etching at the dielectric layer to form the silicon spacers;

wherein each of the silicon spacers has a vertical sidewall.

6. The method of claim 5 , wherein the silicon layer comprises a polycrystalline silicon layer, an amorphous crystalline silicon layer, or a single crystalline silicon layer.

7. The method of claim 1 , wherein the diaphragm layer comprises a polycrystalline silicon layer, an amorphous crystalline silicon layer, or a single crystalline silicon layer.

8. The method of claim 1 , further comprising forming a metal layer on the surface of the diaphragm layer subsequent to removing the dielectric bumps exposed through the openings.

9. The method of claim 8 , further comprising segmenting the substrate to form a plurality of diaphragm structures subsequent to forming the metal layer.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2014
From: TOUCH MICRO-SYSTEM TECHNOLOGY CORP.
To: GREDMANN TAIWAN LTD.
Reel/Frame 033009/0642 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2014
From: TOUCH MICRO-SYSTEM TECHNOLOGY CORP.
To: GREDMAN TAIWAN LTD.
Reel/Frame 032978/0275 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2006
From: HO, HSIEN-LUNG
To: TOUCH MICRO-SYSTEM TECHNOLOGY INC.
Reel/Frame 017831/0073 →