IP Library Granted Patent US 7,306,964
Granted Patent B2
US 7,306,964 · App. 11/430,990 · Granted Dec 11, 2007

Method of manufacturing a vertically-structured GaN-based light emitting diode

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Quick Facts
Patent No.
US 7,306,964
App. No.
11/430,990
Granted
Dec 11, 2007
Kind
B2
Abstract

The present invention relates to a method of manufacturing a vertically-structured GaN-based light emitting diode. The method of manufacturing a vertically-structured GaN-based light emitting diode includes forming a GaN layer on a substrate; patterning the compound layer in a predetermined shape; forming an n-type GaN layer on the patterned compound layer through the epitaxial lateral over-growth process and sequentially forming an active layer and a p-type GaN layer on the n-type GaN layer; forming a structure supporting layer on the p-type GaN layer; sequentially removing the substrate and the GaN layer formed on the substrate after forming the structure supporting layer; removing the patterned compound layer exposed after removing the GaN layer so as to form an n-type GaN layer patterned in a concave shape; and forming an n-type electrode on the n-type GaN layer patterned in a concave shape.

Claims (24)

1. A method of manufacturing a vertically-structured GaN-based light emitting diode comprising:

forming a GaN layer on a substrate;

forming a compound layer on the GaN layer in order to perform an epitaxial lateral over-growth (ELOG) process;

patterning the compound layer in a predetermined shape;

forming an n-type GaN layer on the patterned compound layer through the epitaxial lateral over-growth process and sequentially forming an active layer and a p-type GaN layer on the n-type GaN layer; forming a structure supporting layer on the p-type GaN layer;

sequentially removing the substrate and the GaN layer formed on the substrate after forming the structure supporting layer;

removing the patterned compound layer exposed after removing the GaN layer so as to form an n-type GaN layer patterned in a concave shape; and

forming an n-type electrode on the n-type GaN layer patterned in a concave shape.

2. The method of manufacturing a vertically-structured GaN-based light emitting diode according to claim 1 further including forming a p-type electrode on the p-type GaN layer after forming the p-type GaN layer.

3. The method of manufacturing a vertically-structured GaN-based light emitting diode according to claim 1 further including forming a p-type electrode on the structure supporting layer after forming the structure supporting layer.

4. The method of manufacturing a vertically-structured GaN-based light emitting diode according to claim 1 , wherein the structure supporting layer is formed of any one selected from a group composed of a substrate and a plated layer.

5. The method of manufacturing a vertically-structured GaN-based light emitting diode according to claim 1 , wherein the compound layer is formed of any one compound selected from a compound group composed of SiO 2 and SiN x (silicon-nitride type).

6. The method of manufacturing a vertically-structured GaN-based light emitting diode according to claim 1 , wherein patterning the compound layer includes:

forming a pattern layer patterned in a predetermined shape on the compound layer; and etching the compound layer by using the pattern layer as a mask.

7. The method of manufacturing a vertically-structured GaN-based light emitting diode according to claim 6 , wherein forming the pattern layer includes:

forming photoresist patterns with a predetermined shape on the compound layer; and

re-flowing the photoresist patterns so as to form photoresist patterns with a hemispheric shape.

8. The method of manufacturing a vertically-structured GaN-based light emitting diode according to claim 7 , wherein, in etching the compound layer, the re-flowed photoresist patterns and the compound layer are etched together, so that the compound layer is patterned in a hemispheric shape.

9. The method of manufacturing a vertically-structured GaN-based light emitting diode according to claim 7 or 8 , wherein the hemispheric patterns are formed such that the height thereof ranges from 0.1 to 5 μm, the diameter thereof ranges from 0.5 to 5 μm, and the pattern period thereof ranges from 0.1 to 5 μm.

10. The method of manufacturing a vertically-structured GaN-based light emitting diode according to claim 6 further including removing the pattern layer after etching the compound layer.

11. The method of manufacturing a vertically-structured GaN-based light emitting diode according to claim 1 , wherein forming the n-type GaN layer includes:

forming a undoped GaN layer on the patterned compound layer; and forming a GaN layer doped with n-type impurities on the undoped GaN layer.

12. The method of manufacturing a vertically-structured GaN-based light emitting diode according to claim 11 , wherein forming the GaN layer doped with n-type impurities is performed by growing the GaN layer on the undoped GaN layer while gradually increasing the doping concentration of the n-type impurities.

13. The method of manufacturing a vertically-structured GaN-based light emitting diode according to claim 11 , wherein the undoped GaN layer is formed to have a thickness of 0.1 to 1 μm.

Assignments (4)
MERGER Recorded Aug 7, 2012
From: SAMSUNG LED CO., LTD.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 028744/0272 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 12, 2010
From: SAMSUNG ELECTRO-MECHANICS CO., LTD.
To: SAMSUNG LED CO., LTD.
Reel/Frame 024375/0448 →
RE-RECORD TO CORRECT THE NAME OF THE ASSIGNEE ON THE DOCUMENT PREVIOUSLY RECORDED AT REEL 017883, FRAME 0444. (ASSIGNMENT OF ASSIGNOR'S INTEREST) Recorded Oct 5, 2006
From: LEE, JAE HOON; CHOI, HEE SEOK; OH, JEONG TAK; LEE, SU YEOL
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 018381/0683 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 10, 2006
From: LEE, JAE HOON; CHOI, HEE SEOK; OH, JEONG TAK; LEE, SU YEOL
To: SAMSUNG
Reel/Frame 017883/0444 →