IP Library Granted Patent US 7,476,627
Granted Patent B2
US 7,476,627 · App. 11/431,037 · Granted Jan 13, 2009

Surface preparation prior to deposition

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Quick Facts
Patent No.
US 7,476,627
App. No.
11/431,037
Granted
Jan 13, 2009
Kind
B2
Abstract

Methods are provided herein for treating substrate surfaces in preparation for subsequent nucleation-sensitive depositions (e.g., polysilicon or poly-SiGe) and adsorption-driven deposition (e.g. atomic layer deposition or ALD). Prior to depositing, the surface is treated with non-depositing plasma products. The treated surface more readily nucleates polysilicon and poly-SiGe (such as for a gate electrode), or more readily adsorbs ALD reactants (such as for a gate dielectric). The surface treatment provides surface moieties more readily susceptible to a subsequent deposition reaction, or more readily susceptible to further surface treatment prior to deposition. By changing the surface termination of the substrate with a low temperature radical treatment, subsequent deposition is advantageously facilitated without depositing a layer of any appreciable thickness and without significantly affecting the bulk properties of the underlying material. Preferably less than 10 Å of the bulk material incorporates the excited species, which can include fluorine, chlorine and particularly nitrogen excited species.

Claims (12)

1. A method comprising:

forming a layer of dielectric material over a substrate;

exposing the layer of dielectric material to a source of nitrogen excited species, wherein exposing incorporates less than about 10 atomic percent nitrogen at a depth of greater than about 10 Å from an upper surface of the layer of dielectric material; and

depositing a conductor over the layer of dielectric material after exposing the layer of dielectric material to the source of nitrogen excited species, wherein the conductor contacts a portion of the layer of dielectric material exposed to the source of nitrogen excited species.

2. The method of claim 1 , wherein the substrate is electrically conductive.

3. The method of claim 1 , wherein the layer of dielectric material is a transistor gate dielectric layer.

4. The method of claim 1 , wherein the layer of dielectric material has a dielectric constant of greater than about 4.

5. The method of claim 1 , wherein exposing incorporates less than about 1 atomic percent nitrogen at a depth of greater than about 10 Å from the surface.

6. The method of claim 1 , wherein the layer of dielectric material comprises a material selected from the group consisting of aluminum oxide, zirconium oxide, hafnium oxide, tantalum oxide, barium strontium titanate and strontium bismuth tantalate.

7. The method of claim 6 , wherein the layer of dielectric material comprises zirconium oxide.

8. The method of claim 1 , wherein forming the layer of dielectric material comprises an atomic layer deposition.

9. The method of claim 1 , wherein depositing the conductor comprises a chemical vapor deposition.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2021
From: ASM AMERICA, INC.
To: ASM IP HOLDING B.V.
Reel/Frame 056465/0280 →