Power amplifying semiconductor integrated circuit device for use in communication equipment
The present invention is to provide a technique which optimizes a gate resistor of a bias circuit to thereby make it possible to greatly improve a distortion characteristic of a power amplifier. A bias circuit used as for biasing the gate of a final-stage power transistor is included in a power amplifier provided in a communication mobile system. In the bias circuit, an inductance and a resistor are series-connected between a power supply voltage and the gate of the power transistor. The resistance value of the resistor is set to approximately the same order as an input impedance of the power transistor. When the input impedance of the power transistor is about 10Ω or so, for example, the resistor is set to about a few Ω to about 100Ω. Thus, the gain of the power transistor at a low-frequency band can greatly be suppressed.
1. A semiconductor integrated circuit device suitable for use in mobile communication equipment, comprising a high-frequency power amplifier,
said high-frequency power amplifier including:
a transistor provided at a final stage of the high-frequency power amplifier, said transistor having a gate inputted with a transmit signal, a source connected with a reference potential and a drain which outputs a signal obtained by amplifying the transmit signal;
a first bias circuit which supplies a bias voltage to the drain of the transistor; and
a second bias circuit which supplies a bias voltage to the gate of the transistor,
wherein the second bias circuit includes a gate resistor and an inductance series-connected between a bias power supply voltage and the gate of the transistor, and
wherein the gate resistor has a resistance value of substantially the same order as an input impedance of the transistor at a carrier frequency thereof, which is determined by the sum of a gate capacitance of the transistor and a gate to drain capacitance thereof.
2. The semiconductor integrated circuit device according to claim 1 ,
wherein the transmit signal inputted to the high-frequency power amplifier is digital-modulated by a communication system of any of WCDMA, CDMA2000, and EDGE, and
wherein the high-frequency power amplifier performs a linear operation.
3. The semiconductor integrated circuit device according to claim 1 , wherein the gate resistor has a resistance value of less than or equal to about 100 Ω.
4. The semiconductor integrated circuit device according to claim 1 , wherein the bias circuit has an electrostatic capacitive element connected between the bias power supply voltage and the reference potential.
5. The semiconductor integrated circuit device according to claim 1 , wherein the carrier frequency of the transmit signal amplified by the high-frequency power amplifier is about 2 GHz.
6. A semiconductor integrated circuit device suitable for use in communication equipment comprising a high-frequency power amplifier,
said high-frequency power amplifier including:
a transistor provided at a final stage of the high-frequency power amplifier, said transistor having a gate inputted with a transmit signal, a source connected with a reference potential and a drain which outputs a signal obtained by amplifying the transmit signal;
a first bias circuit which supplies a bias voltage to the drain of the transistor; and
a second bias circuit which supplies a bias voltage to the gate of the transistor,
wherein the second bias circuit includes a gate resistor and an inductance series-connected between a bias power supply voltage and the gate of the transistor, and
wherein the gate resistor has a resistance value of substantially the some order as an input impedance of the transistor at a carrier frequency thereof, which is determined by the sum of a gate capacitance of the transistor and a gate to drain capacitance thereof.
7. The semiconductor integrated circuit device according to claim 6 ,
wherein the transmit signal inputted to the high-frequency power amplifier is digital-modulated by a communication system of any of WCDMA, CDMA2000, and EDGE, and
wherein the high-frequency power amplifier performs a linear operation.
8. The semiconductor integrated circuit device according to claim 6 , wherein the gate resistor has a resistance value of less than or equal to about 100Ω.
9. The semiconductor integrated circuit device according to claim 6 , wherein the bias circuit has an electrostatic capacitive element connected between the bias power supply voltage and the reference potential.
10. The semiconductor integrated circuit device according to claim 6 , wherein the carrier frequency of the transmit signal amplified by the high-frequency power amplifier is about 2 GHz.