Method for detecting, sampling, analyzing, and correcting marginal patterns in integrated circuit manufacturing
View Patent ↗One embodiment of a method for detecting, sampling, analyzing, and correcting hot spots in an integrated circuit design allows the identification of the weakest patterns within each design layer, the accurate determination of the impact of process drifts upon the patterning performance of the real mask in a real scanner, and the optimum process correction, process monitoring, and RET improvements to optimize integrated circuit device performance and yield. The combination of high speed simulation coupled with massive data collection capability on actual aerial images and/or resist images at the specific patterns of interest provides a complete methodology for optimum RET implementation and process monitoring.
1. A method for analyzing areas in a mask having features with a potential to fail, comprising:
simulating a lithography process to produce a simulated image corresponding to the mask;
analyzing the simulated image to identify areas in the mask having features with a potential to fail in the simulated image;
categorizing the areas in the mask having features with a potential to fail into groups of similar patterns;
prioritizing the groups of areas in the mask having features with a potential to fail based on severity;
creating a sampling plan for obtaining data about the prioritized groups of areas in the mask having features with a potential to fail by applying a weighting factor to each prioritized group based on a priority assigned to that group;
generating an aerial image using the mask using a single setting of the lithographic process; and
inspecting portions of the aerial image corresponding to one or more of the identified areas from the simulated image according to the sampling plan.
2. The method of claim 1 , further comprising:
determining and calibrating a resist model to capture resist offsets; and
using the resist model while simulating the lithography process.
3. The method of claim 1 , further comprising:
creating a mask-making model; and
using the mask-making model while simulating the lithography process.
4. The method of claim 1 , further comprising:
exposing a wafer using the mask having features with a potential to fail; and
collecting resist data from the exposed wafer.
5. The method of claim 1 , further comprising:
determining and calibrating a resist model to capture resist effects;
creating a mask-making model; and
using the resist model and the mask-making model while simulating the lithography process.
6. The method of claim 1 , wherein inspecting an aerial image of the mask according to the sampling plan includes measuring the intensity of an aerial image projected onto an image sensor unit configured to be placed in a wafer stage of an exposure tool.
7. The method of claim 1 , wherein analyzing the simulated image includes determining critical dimension values of the features having a potential to fail from the simulated image.
8. A method for analyzing areas in a mask having features with a potential to result in low production yield, comprising:
simulating a lithography process to produce a simulated image corresponding to the mask;
analyzing the simulated image to identify areas in the mask having features with a potential to result in low production yield in the simulated image;
grouping the areas in the mask having features with a potential to result in low production yield into groups of similar patterns;
prioritizing the groups of areas in the mask having features with a potential to result in low production yield according to metrics of severity;
creating a sampling plan for obtaining data about the prioritized groups of areas in the mask having features with a potential to result in low production yield by applying a weighting factor to each prioritized group based on a priority assigned to that group;
generating an aerial image using the mask using a single setting of the lithographic process; and
inspecting portions of the aerial image corresponding to one or more of the identified areas from the simulated image according to the sampling plan.
9. The method of claim 8 , further comprising:
determining and calibrating a resist model to capture resist effects; and
using the resist model while simulating the lithography process.
10. The method of claim 8 , further comprising:
creating a mask-making model; and
using the mask-making model while simulating the lithography process.
11. The method of claim 8 , further comprising:
exposing a wafer using the mask having features with a potential to fail; and
collecting resist data from the exposed wafer.
12. The method of claim 8 , further comprising:
determining and calibrating a resist model to capture resist effects;
creating a mask-making model; and
using the resist model and the mask-making model while simulating the lithography process.
13. The method of claim 8 , wherein inspecting an aerial image of the mask according to the sampling plan includes measuring the intensity of an aerial image projected onto an image sensor unit configured to be placed in a wafer stage of an exposure tool.
14. The method of claim 8 , wherein analyzing the simulated image includes determining critical dimension values of the features having a potential to result in low production yield from the simulated image.
15. A method for analyzing areas in a mask, comprising:
simulating a lithography process to produce a simulated image corresponding to the mask;
analyzing the simulated image to detect areas in the mask having features with a small process window in the simulated image;
categorizing the areas in the mask having features with a small process window into groups based upon predetermined critical features;
prioritizing the groups of areas in the mask having features with a small process window based on severity;
creating a sampling plan for obtaining data about the prioritized groups of areas in the mask having features with a small process window by applying a weighting factor to each prioritized group based on a priority assigned to that group;
generating an aerial image using the mask using a single setting of the lithographic process; and
inspecting portions of the aerial image corresponding to one or more of the identified areas from the simulated image according to the sampling plan.
16. The method of claim 15 , further comprising:
determining and calibrating a resist model to capture resist effects; and
using the resist model while simulating the lithography process.
17. The method of claim 15 , further comprising:
creating a mask-making model; and
using the mask-making model while simulating the lithography process.
18. The method of claim 15 , further comprising:
exposing a wafer using the mask having features with a potential to fail; and
collecting resist data from the exposed wafer.
19. The method of claim 15 , further comprising:
determining and calibrating a resist model to capture resist effects;
creating a mask-making model; and
using the resist model and the mask-making model while simulating the lithography process.
20. The method of claim 15 , wherein inspecting an aerial image of the mask according to the sampling plan includes measuring the intensity of an aerial image projected onto an image sensor unit configured to be placed in a wafer stage of an exposure tool.
21. The method of claim 15 , wherein analyzing the simulated image includes determining critical dimension values of the features having a small process window from the simulated image.
22. A method for analyzing areas in a mask having features with a potential to fail, comprising:
analyzing a simulated aerial image corresponding to the mask to identify areas in the mask having features with a potential to fail in the simulated aerial image;
categorizing the areas in the mask having features with a potential to fail into groups of similar patterns;
prioritizing the groups of areas in the mask having features with a potential to fail based on severity;
creating a sampling plan for obtaining data about the prioritized groups of areas in the mask having features with a potential to fail by applying a weighting factor to each prioritized group based on a priority assigned to that group;
generating an aerial image using the mask using a single setting of a lithographic process corresponding to the simulated aerial image; and
inspecting portions of the aerial image corresponding to one or more of the identified areas from the simulated aerial image according to the sampling plan such that more data is obtained for high-priority groups than for low-priority groups.
23. The method of claim 22 , further comprising:
determining and calibrating a resist model to capture resist effects; and
using the resist model while simulating the lithography process.
24. The method of claim 22 , further comprising:
creating a mask-making model; and
using the mask-making model while simulating the lithography process.
25. The method of claim 22 , further comprising:
exposing a wafer using the mask having features with a potential to fail; and
collecting resist data from the exposed wafer.
26. The method of claim 22 , further comprising:
determining and calibrating a resist model to capture resist effects;
creating a mask-making model; and
using the resist model and the mask-making model while simulating the lithography process.
27. The method of claim 22 , wherein inspecting an aerial image of the mask according to the sampling plan includes measuring the intensity of an aerial image projected onto an image sensor unit configured to be placed in a wafer stage of an exposure tool.
28. The method of claim 22 , wherein analyzing the simulated aerial image includes determining critical dimension values of the features having a potential to fail from the simulated aerial image.