Cascode connection circuit
A cascode connection circuit includes a first field effect transistor (FET) which has a source terminal and a drain terminal, the source terminal being connected to ground; a second FET which has a source terminal and a gate terminal, the source terminal being connected to the drain terminal of the first FET; and a first resistor and a first capacitor connected in series between the source terminal of the first FET and the gate terminal of the second FET. The first FET and the second FET are cascode-connected to each other. The product of the resistance of the first resistor and the capacitance of the first capacitor does not exceed 0.1 times the period of an operating frequency of the circuit.
1. A cascode connection circuit comprising:
a first field effect transistor (FET) which has a source terminal, a gate terminal, and a drain terminal, the source terminal being connected to ground;
a second FET which has a source terminal, a gate terminal, and a drain terminal, the source terminal being connected to the drain terminal of the first FET;
a first resistor having a resistance and a first capacitor having a capacitance connected in series between the source terminal of the first FET and the gate terminal of the second FET, wherein,
the first FET and the second FET are cascode-connected to each other, and
the product of the resistance of the first resistor and the capacitance of the first capacitor does not exceed 0.1 times the period of an operating frequency of the circuit;
a second resistor connected between the drain terminal of the second FET and the gate terminal of the second FET; and
a third resistor connected in parallel with the first resistor and first capacitor, between the source terminal of the first FET and the gate terminal of the second FET.
2. A cascode connection circuit comprising:
a first field effect transistor (FET) which has a source terminal, a gate terminal, and a drain terminal, the source terminal being connected to ground;
a second FET which has a source terminal, a gate terminal, and a drain terminal, the source terminal being connected to the drain terminal of the first FET;
a first resistor having a resistance and a first capacitor having a capacitance connected in series between the source terminal of the first FET and the gate terminal of the second FET, wherein,
the first FET and the second FET are cascode-connected to each other, and
the product of the resistance of the first resistor and the capacitance of the first capacitor does not exceed 0.1 times the period of an operating frequency of the circuit;
a second resistor connected between the drain terminal of the second FET and the gate terminal of the second FET and
a third resistor connected between the gate terminal of the first FET and the gate terminal of the second FET.
3. A cascode connection circuit comprising:
a first field effect transistor (FET) which has a source terminal, a gate terminal, and a drain terminal, the source terminal being connected to ground;
a second FET which has a source terminal, a gate terminal, and a drain terminal, the source terminal being connected to the drain terminal of the first FET;
a first resistor having a resistance and a first capacitor having a capacitance connected in series between the source terminal of the first FET and the gate terminal of the second FET, wherein,
the first FET and the second FET are cascode-connected to each other, and
the product of the resistance of the first resistor and the capacitance of the first capacitor does not exceed 0.1 times the period of an operating frequency of the circuit;
a micro strip line having a first end connected to the drain terminal of the second FET;
a second capacitor connected between a second end of the micro strip line and the source terminal of the first FET;
a second resistor connected between the second end of the micro strip line and the gate terminal of the second FET; and
a third resistor connected in parallel with the first resistor and first capacitor, between the source terminal of the first FET and the gate terminal of the second FET.
4. A cascode connection circuit comprising:
a first field effect transistor (FET) which has a source terminal, a gate terminal, and a drain terminal, the source terminal being connected to ground;
a second FET which has a source terminal, a gate terminal, and a drain terminal, the source terminal being connected to the drain terminal of the first FET;
a first resistor having a resistance and a first capacitor having a capacitance connected in series between the source terminal of the first FET and the gate terminal of the second FET, wherein,
the first FET and the second FET are cascode-connected to each other, and
the product of the resistance of the first resistor and the capacitance of
the first capacitor does not exceed 0.1 times the period of an operating frequency of the circuit;
a micro strip line having a first end connected to the drain terminal of the second FET;
a second capacitor connected between a second end of the micro strip line and the source terminal of the first FET;
a second resistor connected between the second end of the micro strip line and the gate terminal of the second FET; and
a third resistor connected between the gate terminal of the first FET and the gate terminal of the second FET.
5. A cascode connection circuit comprising:
a first field effect transistor (FET) which has a source terminal, a gate terminal, and a drain terminal, the source terminal being connected to ground;
a second FET which has a source terminal, a gate terminal, and a drain terminal, the source terminal being connected to the drain terminal of the first FET;
a first resistor having a resistance and a first capacitor having a capacitance connected in series between the source terminal of the first FET and the gate terminal of the second FET, wherein,
the first FET and the second FET are cascode-connected to each other, and
the product of the resistance of the first resistor and the capacitance of
the first capacitor does not exceed 0.1 times the period of an operating frequency of the circuit;
a first micro strip line having a first end connected to the drain terminal of the second FET;
a second capacitor connected between a second end of the first micro strip line and the source terminal of the first FET;
a second resistor connected between the second end of the first micro strip line and the gate terminal of the second FET;
a second micro strip line having a first end connected to the gate terminal of the first FET; and
a third capacitor connected between a second end of the second micro strip line and the source terminal of the first FET; and
a third resistor connected between the second end of the second micro strip line and the gate terminal of the second FET.
6. A cascode connection circuit comprising a plurality of cascode connection circuits according to claim 1 , connected in parallel to each other.
7. A cascode connection circuit comprising a plurality of cascode connection circuits according to claim 2 , connected in parallel to each other.
8. A cascode connection circuit comprising a plurality of cascode connection circuits according to claim 3 , connected in parallel to each other.
9. A cascode connection circuit comprising a plurality of cascode connection circuits according to claim 4 , connected in parallel to each other.
10. A cascode connection circuit comprising a plurality of cascode connection circuits according to claim 5 , connected in parallel to each other.