IP Library Granted Patent US 7,697,321
Granted Patent B2
US 7,697,321 · App. 11/438,541 · Granted Apr 13, 2010

Non-volatile memory cell and methods thereof

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Quick Facts
Patent No.
US 7,697,321
App. No.
11/438,541
Granted
Apr 13, 2010
Kind
B2
Abstract

A non-volatile storage element disposed at an integrated circuit is disclosed. The storage element includes a first resistive element having a first magnetic tunnel junction (MTJ) element, a first node coupled to the first resistive element, a second resistive element having of a second MTJ element, a second node coupled to the second resistive element, a sense amplifier having a first input coupled to the first node, a second input coupled to the second node, and an output, and a first conductor disposed to conduct a first current to set the first resistive element to a first resistive value and the second resistive element to a second resistive value different from the first resistive value.

Claims (52)

1. A circuit with non-volatile storage, comprising:

a first resistive element comprised of a first magnetic tunnel junction (MTJ) element;

a first node coupled to the first resistive element;

a second resistive element comprised of a second MTJ element;

a second node coupled to the second resistive element;

a sense amplifier having a first input coupled to the first node, a second input coupled to the second node, and an output;

a first conductor disposed to conduct a first current to set the first MTJ element to a first resistive value and the second MTJ element to a second resistive value different from the first resistive value; and

a second conductor disposed to conduct a second current to set the first MTJ element to a third resistive value and to set the second MTJ element to a fourth resistive value different from the third resistive value.

2. The circuit of claim 1 , wherein the sense amplifier provides the output responsive to a difference in voltage between the first node and the second node.

3. The circuit of claim 1 , wherein the first MTJ element comprises a magnetic region having a magnetic moment vector relative to the first conductor that is substantially different than a magnetic moment vector of the second MTJ.

4. The circuit of claim 1 , wherein the sense amplifier provides the output thereof responsive to a difference between a second current flowing into the first node and a third current into the second node.

5. The circuit of claim 4 , wherein the sense amplifier further comprises:

a first transistor having a first current electrode coupled to a first reference voltage terminal, a second current electrode, and a control electrode coupled to the second current electrode; and

a second transistor having a first current electrode coupled to the second current electrode of the first transistor, a second current electrode coupled to the second node, and a control electrode coupled to the second current electrode of the first transistor; and

a third transistor having a first current electrode coupled to the first reference voltage terminal, a second current electrode coupled to the output of the sense amplifier, and a control electrode coupled to the second current electrode of the first transistor; and

a fourth transistor having a first current electrode coupled to the second current electrode of the third transistor, a second current electrode coupled to the first node, and a control electrode coupled to the second current electrode of the first transistor.

6. The circuit of claim 1 , further comprising a volatile storage element having an input coupled to the output of the sense amplifier, and an output for providing a second output signal.

7. The circuit of claim 6 , further comprising:

a program module comprising a first input to receive a control signal, a second input coupled to the data output of the volatile storage element, and an output coupled to the first conductor, wherein the program module selectively provides the first current to the first conductor in response to the data output of the volatile storage element.

8. The circuit of claim 7 , wherein the program comprises:

a first transistor having a first current electrode coupled to the second input of the program module, a second current electrode, and a control electrode coupled to the first input of the program module;

a second transistor having a first current electrode coupled to the second current electrode of the first transistor, a second current electrode coupled to a first power supply voltage terminal, and a control electrode coupled to the first input of the program module; and

a third transistor having a first current electrode coupled to the output of the program module, a second current electrode coupled to the first power supply voltage terminal, and a control electrode coupled to the second current electrode of the first transistor.

9. A storage device, comprising,

a first resistive ladder comprised of a first plurality of magnetic tunnel junction (MTJ) elements;

a first node coupled to the first resistive ladder;

a second resistive ladder comprised of a second plurality of MTJ elements;

a second node coupled to the second resistive ladder;

a sense amplifier having a first input coupled to the first node, a second input coupled to the second node, and an output;

a first reference voltage node; and

a second reference voltage node;

wherein the first resistive ladder comprises a first MTJ element coupled between the first reference voltage node and the first node, and a second MTJ element coupled between the first node and the second reference voltage node; and

wherein the first resistive ladder further comprises a third MTJ element coupled between the first reference voltage node and the first node, and a fourth MTJ element coupled between the first node and the second reference voltage node.

10. The storage device of claim 9 , wherein the second resistive ladder comprises a fifth MTJ element coupled between the first reference voltage node and the second node, a sixth MTJ element coupled between the first reference voltage node and the second node, a seventh MTJ element coupled between the second node the second reference voltage node, and an eighth MTJ element coupled between the second node and the second reference voltage node.

11. The storage device of claim 9 , wherein the sense amplifier provides the output responsive to a difference in voltage between the first node and the second node.

12. The storage device of claim 9 , further comprising:

a volatile storage element coupled to the sense amplifier.

13. A method, comprising:

setting a resistive value of a first resistor ladder comprising a first plurality of magnetic tunnel junction (MTJ) elements and a second resistive ladder comprising a second plurality of MTJ elements based on a current through a conductor of the first plurality of MTJ elements and the second plurality of MTJ elements; and

reading a state of a non-volatile memory cell, wherein the state of the non-volatile memory cell is based on resistive values of the plurality of MTJ elements.

14. The method of claim 13 , further comprising:

sensing a first voltage value at a node coupled to a first one of the first plurality of MTJ elements;

sensing a second voltage value at a node of coupled to a second one of the second plurality of MTJ elements; and

reading the state of the non-volatile memory cell by determining a state of a data signal based on a difference between the first voltage value and the second voltage value.

15. The method of claim 13 , further comprising:

transitioning from an active power state to a low power state; and

selectively providing the current in response to the transitioning from the active power state to the low power state.

16. The method of claim 13 , further comprising:

setting the state of a volatile storage element based on the state of the non-volatile memory cell.

17. The method of claim 16 , further comprising:

transitioning from the low power state to the active state; and

setting the state of the volatile storage element in response to transitioning from the low power state to the active state.

Assignments (12)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
PATENT RELEASE Recorded Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 039707/0471 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 9, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: EVERSPIN TECHNOLOGIES, INC.
Reel/Frame 036084/0057 →