IP Library Granted Patent US 7,603,587
Granted Patent B2
US 7,603,587 · App. 11/441,576 · Granted Oct 13, 2009

Updating a memory block without status logging

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,603,587
App. No.
11/441,576
Granted
Oct 13, 2009
Kind
B2
Abstract

A technique to update a memory block without status logging is presented. An update file includes a pre-update and a post-update information verification code (IVC) for each block to be updated. By comparing the IVCs to an IVC of a block of memory, an update status may be determined.

Claims (13)

1. An apparatus comprising:

a memory having a first portion to store a received update file, the update file including a pre-update information verification code (IVC), a post-update IVC, and difference information; and

a state machine configured to use the IVCs to determine a status of an update to a second portion of the memory, wherein to update the portion of memory, the state machine is further configured to:

calculate a current IVC of a block of memory; and

compare the current IVC with one of pre-update and post-update IVCs.

2. The apparatus as recited in claim 1 , wherein if the current IVC and the pre-update IVC are not equal and the current IVC and a post-update IVC are not equal, the block has been partially updated.

3. The apparatus as recited in claim 1 , wherein the difference information is used to update the information stored in the second portion of the memory.

4. A system comprising:

an antenna to receive an update file;

a memory having a first portion to store the update file, the update file including a pre-update information verification code (IVC), a post-update IVC, and difference information; and

a state machine configured to use the IVCs to determine a status of an update to a second portion of the memory, wherein to update the portion of memory, the state machine is further configured to:

calculate a current IVC of a block of memory; and

compare the current IVC with one of said IVCs.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2023
From: INTEL CORPORATION
To: INTEL NDTM US LLC
Reel/Frame 064928/0832 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2008
From: RUDELIC, JOHN C.
To: INTEL CORPORATION
Reel/Frame 020970/0581 →