Semiconductor integrated circuit device, and adjustment method of semiconductor integrated circuit device
View Patent ↗It is intended to provide a semiconductor integrated circuit device and adjustment method of the same semiconductor integrated circuit device, capable of adjusting an analog signal outputted from an incorporated analog signal generating section without outputting it outside as an analog value. An analog signal AOUT is outputted from an analog signal generating section 3 in which an adjustment signal AD is inputted. The analog signal AOUT is inputted to a judgment section 1 , in which it is compared and judged with a predetermined value and then a judgment signal JG is outputted. The judgment signal JG acts on a predetermined signal storing section 4 as an internal signal and the adjustment signal AD is fetched into the predetermined signal storing section 4 . Further, the judgment signal JG is outputted as digital signal through an external terminal T 2 and an external tester device acquires the adjustment signal and stores the acquired adjustment signal in the predetermined signal storing section 4 . Consequently, the analog signal can be adjusted as analog value without being outputted outside and an adjustment test can be carried out with a simple tester device and according to a simple test method accurately and rapidly.
1. A semiconductor integrated circuit device, comprising:
a virtual load circuit portion that varies a load on an analog signal in response to a load signal;
a load signal generating circuit portion that generates the load signal; and
a judgment portion that judges a state of the analog signal applied to the load that is varied by the virtual load circuit portion,
wherein the load signal generating circuit portion includes:
a plurality of resistance components in series,
a decoding circuit portion that generates a selection signal based on a load setting signal, and
a selection circuit portion having a plurality of circuit portions provided for each connection point among the plurality of resistance components, and the selection circuit portion selecting a circuit portion from the plurality of circuit portions based upon the selection signal.
2. The semiconductor integrated circuit device according to claim 1 , further comprising:
an analog signal generating circuit portion that outputs the analog signal.
3. The semiconductor integrated device according to claim 2 , wherein the analog signal generating circuit portion is an internal power source voltage generating circuit portion and outputs an internal power source voltage as the analog signal.
4. The semiconductor integrated circuit device according to claim 1 , wherein the load includes a current source circuit for generating a load current.
5. The semiconductor integrated circuit device according to claim 1 , wherein at least one of the plurality of the circuit portions includes at least one transfer gate.
6. The semiconductor integrated circuit device according to claim 1 , wherein virtual load circuit portion includes a transistor that receives the load signal and output the analog signal.
7. An adjustment method for a semiconductor integrated circuit device, the adjustment method including:
decoding a load setting signal to generate a selection signal;
selecting at least one circuit path from a plurality of circuit paths based on the selection signal to generate a load signal, the plurality of circuit paths being provided for each connection point of a resistance array;
varying a load on an analog signal in response to the load signal; and
judging a state of the analog signal applied to the varied load.
8. A semiconductor integrated circuit device comprising:
a virtual load circuit portion that includes a transistor that receives a load signal;
a load signal generating circuit portion, connected to the virtual load circuit portion; and
a judgment portion that judges a state of the analog signal applied to the load that is varied by the virtual load circuit portion,
wherein the load signal generating circuit portion includes:
a resistance array having a plurality of resistance components connected in series;
a decoding circuit portion configured to generate a selection signal based on a load setting signal, and
a selection circuit portion having a plurality of circuit portions provided for each connection point of the plurality of resistance components and being capable of selecting a circuit portion from the plurality of the circuit portions based on the selection signal to output the load signal.
9. An adjustment system containing an integrated circuit device, comprising:
a component configured to output a load setting signal to the integrated circuit device;
a virtual load circuit portion configured to vary a load on an analog signal in response to a load signal;
a load signal generating circuit portion configured to generate the load signal; and
a judgment portion configured to judge a state of the analog signal applied to the load that is varied by the virtual load circuit portion,
wherein the load signal generating circuit portion includes:
a resistance array having a plurality of resistance components connected in series;
a decoding circuit portion configured to generate a selection signal based on the load setting signal, and
a selection circuit portion having a plurality of circuit portions for each connection point of the resistance array and being capable of selecting a circuit portion from the plurality of the circuit portions based on the selection signal.