Patent Assignment
Reel/Frame 057501/0144
RELEASE OF SECURITY INTEREST
Recorded: 2021-09-14
Received: 2021-09-14
Pages: 77
Assignor
MUFG UNION BANK, N.A.,
Executed: 2020-04-16
Assignee
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT, SAN JOSE, CA, 95134, UNITED STATES
Covered Applications
(34)
MANAGING OBJECTS WITH ASSIGNED STATUS IN AN AUTOMATED TOOL CONTROL SYSTEM
App. No. 62/868,818
→
SECURITY NETWORK CONTROLLER
App. No. 15/897,867
→
MEMORY INTERFACE CONFIGURABLE FOR ASYNCHRONOUS AND SYNCHRONOUS OPERATION AND FOR ACCESSING STORAGE FROM ANY CLOCK DOMAIN
App. No. 15/273,426
→
SECURITY NETWORK CONTROLLER
App. No. 15/181,201
→
INTEGRATED CIRCUIT DEVICE WITH ON-BOARD CALIBRATION OF SIGNAL GENERATOR CIRCUITS, AND RELATED METHODS
App. No. 15/087,573
→
CPU to perform calibration routines at power-up
App. No. 62/196,489
→
Inter-Bus Communication Interface Device
App. No. 14/297,200
→
PROCESSOR SYSTEM OPTIMIZATION
App. No. 14/091,470
→
GENERATION OF VOLTAGE SUPPLY FOR LOW POWER DIGITAL CIRCUIT OPERATION
App. No. 13/490,163
→
MEMORY INTERFACE CONFIGURABLE FOR ASYNCHRONOUS AND SYNCHRONOUS OPERATION AND FOR ACCESSING STORAGE FROM ANY CLOCK
App. No. 13/312,929
→
GENERATION OF VOLTAGE SUPPLY FOR LOW POWER DIGITAL CIRCUIT OPERATION
App. No. 61/495,634
→
REVERSE MIM CAPACITOR
App. No. 13/046,640
→
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
App. No. 13/024,979
→
INTER-BUS COMMUNICATION INTERFACE DEVICE AND DATA SECURITY DEVICE
App. No. 12/580,993
→
PROCESSOR SYSTEM OPTIMIZATION SUPPORTING APPARATUS AND SUPPORTING METHOD
App. No. 12/549,708
→
MEMORY INTERFACE CONFIGURABLE FOR ASYNCHRONOUS AND SYNCHRONOUS OPERATION AND FOR ACCESSING STORAGE FROM ANY CLOCK DOMAIN
App. No. 11/954,622
→
SENSE AMPLIFIER WITH LEAKAGE TESTING AND READ DEBUG CAPABILITY
App. No. 11/839,632
→
REVERSE MIM CAPACITOR
App. No. 11/644,535
→
Memory Interface Configurable for Asynchronous and Synchronous Operation and for Accessing Storage from any Clock Domain
App. No. 60/869,784
→
NONVOLATILE SEMICONDUCTOR MEMORY HAVING VOLTAGE ADJUSTING CIRCUIT
App. No. 11/607,090
→
High speed and power efficient amplifier with leakage testing and read debug capability
App. No. 60/838,485
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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND ADJUSTMENT METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
App. No. 11/444,401
→
RECONFIGURABLE CIRCUIT
App. No. 11/442,971
→
ENHANCED PROCESSOR ELEMENT STRUCTURE IN A RECONFIGURABLE INTEGRATED CIRCUIT DEVICE
App. No. 11/390,131
→
Semiconductor integrated circuit device, and adjustment method of semiconductor integrated circuit device
App. No. 11/198,225
→
CONTROLLER, DATA MEMORY SYSTEM, DATA REWRITING METHOD, AND COMPUTER PROGRAM PRODUCT
App. No. 11/187,650
→
SEMICONDUCTOR DEVICE HAVING A DYNAMICALLY RECONFIGURABLE CIRCUIT CONFIGURATION
App. No. 11/167,310
→
MICROCOMPUTER CAPABLE OF MONITORING INTERNAL MEMORY
App. No. 11/036,395
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VARIABLE CAPACITANCE CHARGE PUMP SYSTEM AND METHOD
App. No. 10/978,045
→
POWER ON RESET CIRCUITS
App. No. 10/889,245
→
Inter-bus communication interface device and data security device
App. No. 10/790,176
→
Low ripple, fast turn-on charge pump scheme using variable capacitors
App. No. 60/531,010
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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND ADJUSTMENT METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
App. No. 10/648,272
→
Power on reset circuits
App. No. 60/487,819
→