IP Library Granted Patent US 7,923,362
Granted Patent B2
US 7,923,362 · App. 11/447,094 · Granted Apr 12, 2011

Method for manufacturing a metal-semiconductor contact in semiconductor components

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Quick Facts
Patent No.
US 7,923,362
App. No.
11/447,094
Granted
Apr 12, 2011
Kind
B2
Abstract

A method for manufacturing a metal-semiconductor contact in semiconductor Components is disclosed. There is a relatively high risk of contamination in the course of metal depositions in prior-art methods. In the disclosed method, the actual metal -semiconductor or Schottky contact is produced only after the application of a protective layer system, as a result of which it is possible to use any metals, particularly platinum, without the risk of contamination.

Claims (19)

1. A method for manufacturing a metal-semiconductor contact, the method comprising:

providing a semiconductor component having an upper surface;

applying a layer system comprising at least one insulation layer and at least one electrically conductive layer onto the upper surface of the semiconductor component such that a first contact area and a second contact area of a schottky diode are formed, the first contact area being electrically insulated from the second contact area, the first contact area and the second contact area being electrically connected to the semiconductor component;

etching a first window between the first contact area and the second contact area such that the at least one insulation layer remains between the first contact area and the second contact area, the first window being etched in a first mask process;

etching a second window within the first window such that the second window is smaller than the first window and such that a portion of the remaining insulation layer on the upper surface of the semiconductor component is removed so that the upper surface of the semiconductor component is exposed, the second window being etched in a second mask process; and

applying a metal directly into the second window such that the metal directly contacts the upper surface of semiconductor component thereby forming a third contact area and thereby forming the metal-semiconductor contact.

2. The method according to claim 1 , wherein the metal is platinum or tungsten.

3. The method of claim 1 , wherein the semiconductor component is a semiconductor material that is silicon or n-doped silicon.

4. The method according to claim 1 , wherein after the metal has been applied, a heat treatment occurs so that contact areas of chemical compounds or silicides of the metal with the semiconductor material are formed at contact sites of metal and semiconductor material.

5. The method according to claim 4 , wherein the chemically unchanged metal is then removed.

6. The method according to claim 5 , wherein after the metal has been removed, an electrically conductive barrier material or titanium is applied to the contact areas so that the contact openings are substantially completely filled.

7. The method according to claim 6 , wherein a contact material or a contact metal is applied at least in areas above the contact openings and in contact with at least the barrier material.

8. The method according to claim 7 , wherein a passivation layer is then applied to all exposed surfaces of the semiconductor component.

9. The method according to claim 1 , wherein the method is a procedure module for manufacturing semiconductor components.

10. The method according to claim 1 , wherein the semiconductor component is produced in a standard CMOS process.

11. The method according to claim 1 , wherein the semiconductor component is a light-sensitive metal-semiconductor contact.

12. The method according to claim 1 , wherein the semiconductor component is a transistor that is produced in a CMOS process.

13. The method according to claim 1 , wherein the semiconductor component includes a field oxide layer, the field oxide layer extending within the semiconductor material of the semiconductor component to the upper surface of the semiconductor component.

14. The method according to claim 1 , wherein the second mask process is formed in a process step after the first mask process.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2014
From: TELEFUNKEN SEMICONDUCTORS GMBH & CO. KG
To: TELEFUNKEN SEMICONDUCTORS GMBH
Reel/Frame 032641/0121 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2009
From: DIETZ, FRANZ
To: TELEFUNKEN SEMICONDUCTORS GMBH & CO. KG
Reel/Frame 023688/0616 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2009
From: ATMEL AUTOMOTIVE GMBH
To: DIETZ, FRANZ
Reel/Frame 023648/0937 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2009
From: ATMEL GERMANY GMBH
To: ATMEL AUTOMOTIVE GMBH
Reel/Frame 023205/0838 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2006
From: DIETZ, FRANZ; DUDEK, VOLKER; FLORIAN, TOBIAS; GRAF, MICHAEL
To: ATMEL GERMANY GMBH
Reel/Frame 017899/0727 →