IP Library › Granted Patent US 7,566,904
Granted Patent B2
US 7,566,904 · App. 11/448,633 · Granted Jul 28, 2009

Thin film transistor having oxide semiconductor layer and manufacturing method thereof

Assignee: Casio Computer Co., Ltd.
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Quick Facts
Patent No.
US 7,566,904
App. No.
11/448,633
Granted
Jul 28, 2009
Kind
B2
Abstract

A thin film transistor has a semiconductor thin film including zinc oxide, a protection film formed on entirely the upper surface of the semiconductor thin film, a gate insulating film formed on the protection film, a gate electrode formed on the gate insulating film above the semiconductor thin film, and a source electrode and drain electrode formed under the semiconductor thin film so as to be electrically connected to the semiconductor thin film.

Claims (41)

1. A thin film transistor, comprising:

a semiconductor thin film including zinc oxide;

a protection film formed on an entire upper surface of the semiconductor thin film and having a plan-view shape that is substantially the same as a plan-view shape of the semiconductor thin film;

a gate insulating film formed on the protection film;

a gate electrode formed on the gate insulating film above the semiconductor thin film;

a source electrode and a drain electrode formed under the semiconductor thin film so as to be electrically connected to the semiconductor thin film, the source electrode and the drain electrode having portions protruding at a periphery of the semiconductor thin film and the protection film; and

ohmic contact layers made of n type zinc oxide which are respectively provided on upper surfaces of the source electrode and the drain electrode under the semiconductor thin film,

wherein surrounding end surfaces of the ohmic contact layers have substantially a same shape as surrounding end surfaces of the semiconductor thin film and the protection film except end surfaces of the ohmic contact layers, which face each other, are formed in a same shape as end surfaces of the source electrode and the drain electrode that face each other, and

wherein the gate insulating film covers peripheral side surfaces of the semiconductor thin film, the protection film and the ohmic contact layers, and outer surfaces of the protruding portions of the source electrode and the drain electrode.

2. A thin film transistor, comprising:

a semiconductor thin film including zinc oxide;

a protection film formed on an entire upper surface of the semiconductor thin film and having a plan-view shape that is substantially the same as a plan-view shape of the semiconductor thin film;

a gate insulating film formed on the protection film;

a gate electrode formed on the gate insulating film above the semiconductor thin film;

a source electrode and a drain electrode formed under the semiconductor thin film so as to be electrically connected to the semiconductor thin film; and

ohmic contact layers made of n type zinc oxide which are respectively provided on upper surfaces of the source electrode and the drain electrode under the semiconductor thin film,

wherein end surfaces of the ohmic contact layers, which face each other, protrude from end surfaces of the source electrode and the drain electrode that face each other.

3. The thin film transistor according to claim 2 , further comprising an overcoat film which covers the gate electrode.

4. The thin film transistor according to claim 3 , wherein a pixel electrode is formed on an upper surface of the overcoat film so as to be connected to the source electrode.

5. The thin film transistor according to claim 4 , wherein an auxiliary capacitor electrode is formed between the gate insulating film and the overcoat film.

6. The thin film transistor according to claim 5 , wherein a data line connected to the drain electrode is formed on a same layer as the drain electrode,

wherein the auxiliary capacitor electrode comprises a portion that overlaps the data line via the gate insulating film, and

wherein a width of the portion of the auxiliary capacitor electrode that overlaps the data line is larger than a width of the data line.

7. The thin film transistor according to claim 6 , wherein the auxiliary capacitor electrode overlaps all peripheral edges of the pixel electrode.

8. The thin film transistor according to claim 7 , further comprising an insulating film which covers the gate electrode, wherein the auxiliary capacitor electrode is formed on an upper surface of the insulating film.

9. The thin film transistor according to claim 8 , wherein a scanning line connected to the gate electrode is formed on a same layer as the gate electrode,

wherein the auxiliary capacitor electrode comprises a portion that overlaps the scanning line via the insulating film, and

wherein a width of the portion of the auxiliary capacitor electrode overlapping the scanning line is larger than a width of the scanning line.

10. The thin film transistor according to claim 8 , wherein the auxiliary capacitor electrode is formed on an upper surface of the gate insulating film.

11. The thin film transistor according to claim 1 , further comprising an overcoat film which covers the gate electrode.

12. The thin film transistor according to claim 11 , wherein a pixel electrode is formed on an upper surface of the overcoat film so as to be connected to the source electrode.

13. The thin film transistor according to claim 12 , wherein an auxiliary capacitor electrode is formed between the gate insulating film and the overcoat film.

14. The thin film transistor according to claim 13 , wherein a data line connected to the drain electrode is formed on a same layer as the drain electrode,

wherein the auxiliary capacitor electrode comprises a portion that overlaps the data line via the gate insulating film, and

wherein a width of the portion of the auxiliary capacitor electrode that overlaps the data line is larger than a width of the data line.

15. The thin film transistor according to claim 14 , wherein the auxiliary capacitor electrode overlaps all peripheral edges of the pixel electrode.

16. The thin film transistor according to claim 15 , further comprising an insulating film which covers the gate electrode, wherein the auxiliary capacitor electrode is formed on an upper surface of the insulating film.

17. The thin film transistor according to claim 16 , wherein a scanning line connected to the gate electrode is formed on a same layer as the gate electrode,

wherein the auxiliary capacitor electrode comprises a portion that overlaps the scanning line via the insulating film, and

wherein a width of the portion of the auxiliary capacitor electrode overlapping the scanning line is larger than a width of the scanning line.

18. The thin film transistor according to claim 16 , wherein the auxiliary capacitor electrode is formed on an upper surface of the gate insulating film.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2013
From: REMSEN INNOVATION, LLC
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 030951/0988 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2012
From: CASIO COMPUTER CO., LTD.
To: REMSEN INNOVATION, LLC
Reel/Frame 028265/0258 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2006
From: ISHII, HIROMITSU
To: CASIO COMPUTER CO., LTD.
Reel/Frame 017985/0895 →
Priority Claims (1)
JP 2005-170348 · Jun 10, 2005 · national
Continuity (1)
Related Publication 20060284172A1 · Dec 21, 2006