Integrated circuit having a precharging circuit

1. An integrated circuit having a memory comprising:

a resistivity changing element having a first side and a second side;

a bit line coupled to the first side of the element;

an access device coupled to the second side of the element;

a word line coupled to the access device for controlling the access device; and

a circuit to program the element to a selected one of three or more states, the circuit adapted

to precharge the bit line to a first bit line precharge voltage having a first bit line precharge voltage amplitude and then to apply a voltage pulse having a first word line voltage amplitude to the word line if the element is to be programmed to a first selected state, and

to precharge the bit line to a second bit line precharge voltage having a second bit line precharge voltage amplitude and then to apply a voltage pulse having a second word line voltage amplitude to the word line if the element is to be programmed to a second selected state,

wherein the first bit line precharge voltage amplitude is smaller than the second bit line precharge voltage amplitude.

2. The integrated circuit of claim 1 , wherein the access device comprises a transistor.

3. The integrated circuit of claim 2 , wherein the transistor comprises a bipolar transistor.

4. The integrated circuit of claim 1 , wherein the voltage pulse comprises a set voltage pulse.

5. The integrated circuit of claim 1 , wherein the voltage pulse comprises a reset voltage pulse.

6. A memory comprising:

a phase change element;

a bit line coupled to one side of the element;

a transistor having a source-drain path, one side of the source-drain path coupled to another side of the element;

a word line coupled to a gate of the transistor; and

a circuit to program the element to a selected one of three or more states, the circuit configured

to precharge the bit line to a first bit line precharge voltage having a first bit line precharge amplitude and then to apply a voltage pulse having a first word line voltage amplitude to the word line if the element is to be programmed to a first selected state, and

to precharge the bit line to a second bit line precharge voltage having a second bit line precharge voltage amplitude and then to apply a voltage pulse having a second word line voltage amplitude to the word line if the element is to be programmed to a second selected state,

wherein the first bit line precharge voltage amplitude is smaller than the second bit line precharge voltage amplitude.

7. The memory of claim 6 , wherein the voltage pulse comprises a set voltage pulse.

8. The memory of claim 6 , wherein the voltage pulse comprises a reset voltage pulse.

9. A memory comprising:

a phase change element;

a bit line coupled to one side of the element;

an access device coupled to another side of the element;

a word line coupled to the access device for controlling the access device; and

means for programming the element to a selected one of three or more states, the means including:

means for precharging the bit line to a first bit line precharge voltage having a first bit line precharge voltage amplitude and then for applying a voltage pulse having a first word line voltage amplitude to the word line if the element is to be programmed to a first selected state, and

means for precharging the bit line to a second bit line precharge voltage having a second bit line precharge voltage amplitude and then for applying a voltage pulse having a second word line voltage amplitude to the word line if the element is to be programmed to a second selected state,

wherein the first bit line precharge voltage amplitude is smaller than the second bit line precharge voltage amplitude.

10. The memory of claim 9 , wherein the means for applying the voltage pulse comprises means for applying a set voltage pulse.

11. The memory of claim 9 , wherein the means for applying the voltage pulse comprises means for applying a reset voltage pulse.

12. A method for programming a memory cell to a selected one of three or more states, the method comprising:

precharging a bit line coupled to one side of the phase change element to a first bit line precharge voltage having a first bit line precharge voltage amplitude and then applying a voltage pulse having a first word line voltage amplitude to a word line coupled to an access device for controlling the access device if the element is to be programmed to a first selected state; and

precharging the bit line to a second bit line precharge voltage having a second bit line precharge voltage amplitude and then applying a voltage pulse having a second word line voltage amplitude to the word line if the element is to be programmed to a second selected state,

where in the first bit line precharge voltage amplitude is smaller than the second bit line precharge voltage amplitude.

13. The method of claim 12 , wherein applying the voltage pulse comprises applying a set voltage pulse.

14. The method of claim 12 , wherein applying the voltage pulse comprises applying a reset voltage pulse.

15. A method for programming a phase change element to a selected one of three or more states, the method comprising:

applying a first bit line precharge voltage having a first bit line precharge amplitude to a bit line coupled to the phase change element;

setting the phase change element to an initial state by applying a first voltage pulse having a first word line voltage amplitude to a word line of a transistor coupled to the element;

setting the phase change element to the selected state by applying a second voltage pulse having a second word line voltage amplitude if the element is to be programmed to a first selected state; and

setting the phase change element to the selected state by applying a second voltage pulse having a third word line voltage amplitude if the element is to be programmed to a second selected state,

wherein the first, second, and third word line voltage amplitudes are different.

16. The method of claim 15 , wherein setting the phase change element to the initial state comprises applying a reset voltage pulse, and wherein setting the phase change element to the selected state comprises applying a set voltage pulse.

17. The method of claim 15 , wherein setting the phase change element to the initial state comprises applying a set voltage pulse, and wherein setting the phase change element to the selected state comprises applying a reset voltage pulse.

18. The method of claim 15 , further comprising:

removing the first bit line precharge voltage from the bit line after setting the phase change element to the initial state; and

applying a second bit line precharge voltage having a second bit line precharge amplitude to the bit line before setting the phase change element to the selected state.

19. The method of claim 18 , wherein applying the second bit line precharge voltage comprises applying a second bit line precharge voltage based on the selected state.

20. The method of claim 15 , further comprising:

applying a second bit line precharge voltage having a second bit line precharge amplitude to the bit line before setting the phase change element to the selected state.

21. The method of claim 20 , wherein applying the second bit line precharge voltage comprises applying a second bit line precharge voltage based on the selected state.

22. A memory comprising:

a phase change element having a first side and a second side;

one of a common and a ground coupled to the first side of the element;

an access device coupled to the second side of the element and a bit line;

a word line coupled to the access device for controlling the access device; and

a circuit to program the element to a selected one of three or more states, the circuit configured

to precharge the bit line to a first bit line precharge voltage having a first bit line precharge amplitude and then to apply a voltage pulse having a first word line voltage amplitude to the word line if the element is to be programmed to a first selected state, and

to precharge the bit line to a second bit line precharge voltage having a second bit line precharge voltage amplitude and then to apply a voltage pulse having a second word line voltage amplitude to the word line if the element is to be programmed to a second selected state,

wherein the first bit line precharge voltage amplitude is smaller than the second bit line precharge voltage amplitude.