IP Library Granted Patent US 7,601,589
Granted Patent B2
US 7,601,589 · App. 11/454,594 · Granted Oct 13, 2009

Method of manufacturing flash memory device

Assignee: Hynix Semiconductor Inc.
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Quick Facts
Patent No.
US 7,601,589
App. No.
11/454,594
Granted
Oct 13, 2009
Kind
B2
Abstract

The invention provides a method of manufacturing a flash memory device. Nitride film spacers are formed on sidewalls of protruded isolation films. A recess is formed in a semiconductor substrate by a self-aligned etch process using the nitride film spacers as masks. It is therefore possible to form a uniform recess over the entire wafer. Furthermore, a floating gate is formed on the semiconductor substrate including the recess in a self-aligned manner. Accordingly, a contact area between the floating gate and the semiconductor substrate can be increased as large as a recess surface area.

Claims (49)

1. A method of manufacturing a flash memory device, the method comprising:

forming trenches for isolation films in a semiconductor substrate;

forming isolation films, which partially protrude upwardly from the semiconductor substrate and define sidewalls, in the trenches;

forming nitride film spacers on a top surface and sidewalls of the protruding isolation films;

etching the semiconductor substrate by an etch process using the nitride film spacers as masks, thereby forming a recess in the semiconductor substrate;

stripping the nitride film spacers;

forming a tunnel oxide film on the semiconductor substrate in which the recess is formed;

forming floating gate films on the tunnel oxide film, whereby the size of a contact area between the floating gate films and the semiconductor substrate is increased by means of the recess; and

stripping the projected portions of the isolation films after forming the floating gate films.

2. The method of claim 1 , wherein the oxide film is a screen oxide film for injecting threshold voltage ions.

3. The method of claim 1 , comprising forming the trenches by an etch process using mixed gas comprising HBr gas and O 2 gas such that an inclined angle of a trench etch profile is maintained to 86 degrees or less.

4. The method of claim 1 , comprising forming the nitride film spacers by forming a nitride film on the resulting surface including the protruded isolation films and then performing a spacer etch process.

5. The method of claim 4 , comprising performing the spacer etch process in oxide etch equipment using a mixed gas comprising CF 4 gas, CHF 3 gas, O 2 gas, and Ar gas.

6. The method of claim 1 , comprising forming the recess at the center of an active region of the semiconductor substrate by performing a self-aligned etch process using the nitride film spacers as etch masks.

7. The method of claim 6 , comprising performing the self-aligned etch process in polysilicon etch equipment using a mixed gas comprising Cl 2 gas and HBr gas.

8. The method of claim 1 , further comprising a post etch treatment (PET) process after the etch process of forming the recess.

9. The method of claim 1 , comprising stripping the nitride film spacers using a wet chemical solution containing NH 3 F+HF and H 3 PO 4 .

10. The method of claim 1 , comprising forming the floating gate films by a self-aligned method in which a polysilicon layer is formed on the resulting surface in which the tunnel oxide film is formed and polishing the polysilicon layer by a chemical mechanical polishing (CMP) process until top surfaces of the isolation films are sufficiently exposed.

11. The method of claim 1 , comprising performing the process of stripping the projected portions of the isolation films using a wet chemical solution of H 2 O+HF and NH 4 OH+H 2 O 2 +H 2 O.

12. A method of manufacturing a flash memory device, the method comprising:

sequentially forming an oxide film, a nitride film, an amorphous carbon film, an SiON film, and an O-BARC film on a semiconductor substrate, thereby forming a hard mask layer;

forming photoresist patterns on the O-BARC film, and sequentially etching and patterning the O-BARC film, the SiON film, the amorphous carbon film, the nitride film, and the oxide film;

etching the semiconductor substrate exposed by the etch process, thus forming trenches for device isolation;

stripping the patterned amorphous carbon film;

forming isolation films defining sidewalls within the trenches;

stripping the patterned nitride film whereby the isolation films protrude;

forming nitride film spacers on a top surface and sidewalls of the protruded isolation films;

etching the semiconductor substrate by an etch process using the nitride film spacers as masks, thereby forming a recess in the semiconductor substrate;

stripping the nitride film spacers; forming a tunnel oxide film on the semiconductor substrate in which the recess is formed;

forming floating gate films on the tunnel oxide film, whereby a contact area between the floating gate films and the semiconductor substrate is increased by means of the recess; and

stripping the projected portions of the isolation films after forming the floating gate films.

13. The method of claim 12 , wherein the oxide film is a screen oxide film for injecting threshold voltage ions.

14. The method of claim 12 , comprising performing the etch process of the O-BARC film using a mixed gas comprising CF 4 gas, CHF 3 gas, and O 2 gas using the photoresist patterns as etch masks, and during the etch process, stripping the photoresist patterns to a desired thickness.

15. The method of claim 12 , comprising performing the etch process of the SiON film using a mixed gas comprising CF 4 gas and CHF 3 gas using the photoresist patterns as etch masks, and during the etch process, stripping the photoresist patterns by a desired thickness.

16. The method of claim 12 , comprising performing the etch process of the amorphous carbon film using a mixed gas comprising CO gas and N 2 gas, or a mixed gas comprising NH 3 gas and O 2 gas using the photoresist patterns as etch masks, and during the etch process, stripping the photoresist patterns to a desired thickness.

17. The method of claim 12 , comprising performing the etch process of the nitride film using a mixed gas comprising CF 4 gas, CHF 3 gas, O 2 gas, and Ar gas, and during the etch process, exposing the oxide film by etching the photoresist patterns on the patterned amorphous carbon film, the patterned O-BARC film, the patterned SiON film, and stripping the nitride film.

18. The method of claim 12 , comprising forming the trenches by an etch process using the patterned amorphous carbon film as an etch mask.

19. The method of claim 12 , comprising forming the trenches by an etch process using a mixed gas comprising HBr gas and O 2 gas such that an inclined angle of a trench etch profile is maintained to 86 degrees or less.

20. The method of claim 12 , comprising stripping the patterned amorphous carbon film by a photoresist strip process.

21. The method of claim 12 , comprising performing the process of sequentially etching the O-BARC film, the SiON film, the amorphous carbon film, and the nitride film in-situ in the same etch equipment.

22. The method of claim 12 , comprising stripping the patterned nitride film using a wet chemical solution containing NH 3 F+HF and H 3 PO 4 .

23. The method of claim 12 , comprising forming the nitride film spacers by forming a nitride film on the resulting surface including the protruded isolation films and then performing a spacer etch process.

24. The method of claim 23 , comprising performing the spacer etch process in oxide etch equipment using a mixed gas comprising CF 4 gas, CHF 3 gas, O 2 gas, and Ar gas.

25. The method of claim 12 , comprising forming the recess at the center of an active region of the semiconductor substrate by performing a self-aligned etch process using the nitride film spacers as etch masks.

26. The method of claim 25 , comprising performing the self-aligned etch process in polysilicon etch equipment using a mixed gas comprising Cl 2 gas and HBr gas.

27. The method of claim 12 , further comprising a post etch treatment (PET) process after the etch process of forming the recess.

28. The method of claim 12 , comprising stripping the nitride film spacers using a wet chemical solution containing NH 3 F+HF and H 3 PO 4 .

29. The method of claim 12 , comprising forming the floating gate films by a self-aligned method comprising forming a polysilicon layer on the resulting surface in which the tunnel oxide film is formed and polishing the polysilicon layer by a chemical mechanical polishing (CMP) process until top surfaces of the isolation films are sufficiently exposed.

30. The method of claim 12 , comprising performing the process of stripping the projected portions of the isolation films using a wet chemical solution of H 2 O+HF and NH 4 OH+H 2 O 2 +H 2 O.

Assignments (2)
CHANGE OF NAME Recorded Apr 7, 2011
From: SURGICAL NAVIGATION TECHNOLOGIES, INC.
To: MEDTRONIC NAVIGATION, INC.
Reel/Frame 026100/0686 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2006
From: KIM, JAE HEON
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 018004/0392 →
Priority Claims (1)
KR 10-2005-0086189 · Sep 15, 2005 · national
Continuity (1)
Related Publication 20070059884A1 · Mar 15, 2007