IP Library Granted Patent US 7,675,111
Granted Patent B2
US 7,675,111 · App. 11/455,173 · Granted Mar 9, 2010

Semiconductor device including diffusion layer formed in drift region disposed apart from base region

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Quick Facts
Patent No.
US 7,675,111
App. No.
11/455,173
Granted
Mar 9, 2010
Kind
B2
Abstract

Aiming at providing a semiconductor device capable of reducing the ON-resistance when voltage smaller than a predetermined value is applied to the base region and the drift region, and capable of increasing the ON-resistance so as to prevent thermal fracture when the voltage is not smaller than the predetermined value, and at providing a method of fabricating such semiconductor device, a P-type diffusion layer 7 is formed in an N-type drift region 2 of a semiconductor device 100 , as being apart from a base region 5 , wherein the diffusion layer 7 is formed in a region partitioned by lines L each extending from each of the intersections of the boundary B, between the drift region 2 and a base area 5 A of the base region 5 , and the side faces of a trench 15 surrounding the base area 5 A of the base region 5 , towards the bottom plane of the drift region 2 right under the base area 5 A, while keeping an angle θ 2 of 50° between the lines L and the boundary B.

Claims (14)

1. A semiconductor device comprising:

a first-conductivity-type drift region;

a second-conductivity-type base region formed on a surficial portion of said drift region;

a gate electrode disposed in a trench wherein the trench extends over a surface of said base region, and penetrates said base region to reach said drift region; and

a first-conductivity-type source region formed in said base region,

said base region including a base area partitioned by said trench, and

said drift region having a second-conductivity-type diffusion layer formed therein, as being disposed apart from said base region, wherein

in a section taken in one direction normal to a direction of extension of said trench,

said base area is surrounded by said trench, and

said diffusion layer is not formed in a region except another region partitioned by

a pair of lines and a bottom line of said base; and the pair of lines each extending from each of intersections of the bottom line, and side faces of said trench surrounding said base area, towards a bottom plane of said drift region right under said base area, inclined at 50° away from said bottom line.

2. The semiconductor device as claimed in claim 1 , wherein a voltage of 1 V or larger is applied between said base region and said drift region so that a depletion layer, which formed by said base region and said drift region, reaches to another depletion layer formed by said diffusion layer and said drift region.

3. The semiconductor device as claimed in claim 1 , wherein

another diffusion layer is not formed in adjacent region except another adjacent region partitioned by other pair of lines and another bottom line of another base region; and the other pair of lines each extending from each of other intersections of the another bottom line, and other side faces of another trench surrounding said another base area, toward the bottom plane of said drift region right under said another base area, inclined at 50° away from said another bottom line.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Nov 4, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025311/0842 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2006
From: ARAI, TAKAO
To: NEC ELECTRONICS CORPORATION
Reel/Frame 017989/0790 →