Oscillator with stacked amplifier
View Patent ↗Embodiments of the invention provide a low-power, high-gain amplifier for a crystal oscillator. In some embodiments, the oscillator amplifier circuit comprises two NMOS transistors stacked in series with a PMOS transistor. In various embodiments, each of the NMOS transistors is diode-connected through a resistor and has the input signal capacitively coupled onto its control terminal. The stacked amplifier raises the DC level of the amplified oscillatory signal and can support a substantial oscillation amplitude without clipping.
1. An oscillator amplifier, comprising:
an oscillation source operable to generate an oscillatory signal; and
a stacked amplifier comprising first and second transistors of the same conductivity type operable to receive said oscillatory signal and to generate an amplified oscillatory signal therefrom, wherein said first and second transistors are configured with their respective control terminals resistively coupled to one of their current terminals, thereby raising the DC level of said amplified oscillatory signal.
2. The oscillator amplifier of claim 1 , wherein said first transistor comprises a first NMOS transistor coupled to an input terminal of said oscillator amplifier via a first capacitor, wherein said first transistor is operable to receive an input signal via said first capacitor.
3. The oscillator amplifier of claim 2 , wherein said second transistor comprises a second NMOS transistor coupled to said input terminal of said oscillator amplifier via a second capacitor and is operable to receive said input signal via said second capacitor.
4. The oscillator amplifier of claim 3 , wherein the control terminals of said first and second NMOS transistors are capacitively coupled by a third capacitor.
5. The oscillator amplifier of claim 4 , further comprising a PMOS transistor operable to receive an input reference current and to generate a controlled reference current therefrom.
6. The oscillator amplifier of claim 5 , wherein said PMOS transistor is controlled by a fixed bias.
7. The oscillator amplifier of claim 5 , wherein said PMOS transistor is controlled by an amplitude-controlled bias.
8. The oscillator amplifier of claim 5 , wherein said controlled reference current generated by said PMOS transistor is controlled by capacitively coupling an input signal to the base of said PMOS transistor.
9. A method of using an oscillator amplifier to amplify an oscillatory signal, comprising:
using an oscillation source to generate an oscillatory signal; and
using a stacked amplifier comprising first and second transistors of the same conductivity type to receive said oscillatory signal and to generate an amplified oscillatory signal therefrom, wherein said first and second transistors are configured with their respective control terminals resistively coupled to one of their current terminals, thereby raising the DC level of said amplified oscillatory signal.
10. The method of claim 9 , wherein said first transistor comprises a first NMOS transistor and wherein said method further comprises:
using a first capacitor to couple said first NMOS transistor to an input terminal of said amplifier.
11. The method of claim 10 , further comprising:
using a second capacitor to couple said second transistor to an input terminal of said oscillator amplifier, wherein said second transistor comprises a NMOS transistor.
12. The method of claim 11 , further comprising:
using a third capacitor to capacitively couple the control terminals of said first and second NMOS transistors.
13. The method of claim 12 , further comprising:
using a PMOS transistor to receive a reference current and to generate a controlled reference current therefrom.
14. The method of claim 12 , further comprising:
using an amplitude-controlled bias to control operation of said PMOS transistor.
15. The method of claim 14 , further comprising:
capacitively coupling an input signal to the control terminal of said PMOS transistor to generate said controlled reference current.
16. An amplifier, comprising:
a PMOS transistor operable to receive an input reference current and to generate a controlled reference current therefrom; and
first and second NMOS transistors operable to receive an input signal and said controlled reference current and to generate an amplified signal therefrom, wherein said first NMOS transistor is configured with its control terminal and one of its current terminals resistively connected, thereby raising the DC level of said amplified signal.
17. The amplifier of claim 16 , wherein operation of said PMOS transistor is controlled by a fixed bias.
18. The amplifier of claim 17 , wherein operation of said PMOS transistor is controlled by an amplitude-controlled bias.