IP Library Granted Patent US 7,482,822
Granted Patent B2
US 7,482,822 · App. 11/461,734 · Granted Jan 27, 2009

Apparatus and method for limiting over travel in a probe card assembly

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Quick Facts
Patent No.
US 7,482,822
App. No.
11/461,734
Granted
Jan 27, 2009
Kind
B2
Abstract

Methods and apparatuses for testing semiconductor devices are disclosed. Over travel stops limit over travel of a device to be tested with respect to probes of a probe card assembly. Feedback control techniques are employed to control relative movement of the device and the probe card assembly. A probe card assembly includes flexible base for absorbing excessive over travel of the device to be tested with respect to the probe card assembly.

Claims (17)

1. A method of making a probe card assembly, said method comprising:

forming a plurality of probes on a surface of a substrate; and

forming a stop structure on said surface of said substrate, wherein said forming a plurality of probes and said forming a stop structure comprise:

lithographically forming a plurality of tip structures and a stop plate on a sacrificial substrate; and

transferring said tip structures to a plurality of probe bodies attached to said surface of said substrate; and

transferring said stop plate to a stop support attached to said surface of said substrate.

2. The method of claim 1 , wherein:

said transferring said tip structures to a plurality of probe bodies attached to said surface of said substrate, and said transferring said stop plate to a stop support attached to said surface of said substrate comprise:

attaching said tip structures to said probe bodies;

attaching said stop plate to said stop support; and

releasing said tip structures and said stop plate from said sacrificial substrate.

3. The method of claim 1 , wherein said lithographically forming a plurality of tip structures and a stop plate on a sacrificial substrate comprises:

patterning a plurality of masking layers; and

depositing material within said patterned masking layers to form said tip structures and said stop plate.

4. The method of claim 3 , wherein said patterned masking layers define shapes of said tip structures and said stop plate.

5. The method of claim 3 , wherein said patterned masking layers define relative locations of said tip structures and said stop plate.

6. The method of claim 5 , wherein contact portions of said tip structures are located in a first plane and a contact portion of said stop plate is located in a second plane, and said first plane is a predetermined distance from said second plane.

Assignments (2)
RELEASE OF SECURITY INTEREST Recorded Aug 7, 2025
From: HSBC BANK USA, NATIONAL ASSOCIATION
To: FORMFACTOR, INC.
Reel/Frame 072853/0001 →
SECURITY INTEREST IN UNITED STATES PATENTS AND TRADEMARKS Recorded Jul 12, 2016
From: FORMFACTOR, INC.; ASTRIA SEMICONDUCTOR HOLDINGS, INC.; CASCADE MICROTECH, INC.; MICRO-PROBE INCORPORATED
To: HSBC BANK USA, NATIONAL ASSOCIATION
Reel/Frame 039184/0280 →