Integrated circuit system with contact distribution film
View Patent ↗A integrated circuit system including providing an integrated circuit device, forming an undoped insulating layer over the integrated circuit device, forming a thin insulating layer over the undoped insulating layer, forming a doped insulating layer over the thin insulating layer, and forming a contact in the undoped insulating layer, thin insulating layer and the doped insulating layer.
1. A method of manufacture of an integrated circuit system comprising:
providing an integrated circuit device;
forming an undoped insulating layer over the integrated circuit device;
forming a thin insulating layer over the undoped insulating layer having a dopant level within a range of dopant levels for preventing lateral etch by depositing the thin insulating layer with a flow of dopant between about thirty percent to about fifty percent of a bulk flow of the dopant;
forming a doped insulating layer over the thin insulating layer by depositing the doped insulating layer with the bulk flow of the dopant;
forming a recess by etching only the undoped insulating layer, the thin insulating layer and the doped insulating layer, the thin insulating layer including a thin insulating layer sidewall sloped less than a sidewall of the undoped insulating layer and a sidewall of the doped insulating layer; and
forming a contact in the recess.
2. The method as claimed in claim 1 wherein forming the thin insulating layer comprises forming a lightly doped thin insulating layer between the undoped insulating layer and the doped insulating layer.
3. The method as claimed in claim 1 wherein forming the doped insulating layer comprises depositing a doped TEOS layer.
4. The method as claimed in claim 1 wherein forming the contact comprises forming a tungsten contact.
5. A method of manufacture of an integrated circuit system with contact film comprising:
forming an integrated circuit device having a semiconductor layer on a substrate;
depositing an undoped insulating layer over the substrate;
depositing a thin insulating layer on the undoped insulating layer having a dopant level within a range of dopant levels for preventing lateral etch by depositing the thin insulating layer with a flow of dopant between about thirty percent to about fifty percent of a bulk flow of the dopant;
depositing a doped insulating layer on the thin insulating layer by depositing the doped insulating layer with the bulk flow of the dopant;
forming a recess by etching only the undoped insulating layer, the thin insulating layer and the doped insulating layer, the thin insulating layer including a thin insulating layer sidewall sloped less than a sidewall of the undoped insulating layer and a sidewall of the doped insulating layer; and
depositing a contact in the recess.
6. The method as claimed in claim 5 wherein depositing the thin insulating layer comprises depositing a lightly doped thin insulating layer having dopants combined with the dielectric by a deposition system.
7. The method as claimed in claim 5 wherein depositing the contact comprises forming a graduated profile.
8. The method as claimed in claim 5 further comprising depositing an interconnect layer over the contact interconnecting the integrated circuit device.