Semiconductor device and manufacturing method thereof
View Patent ↗A semiconductor device and a manufacturing method thereof that can prevent mutual diffusion of impurity in a silicide layer and can decrease sheet resistance of an N-type polymetal gate electrode and a P-type polymetal gate electrode, respectively in the semiconductor device having gate electrodes of a polymetal gate structure and a dual gate structure are provided. The P-type polymetal gate electrode includes a P-type silicon layer containing P-type impurity, a silicide layer formed on the P-type silicon layer and having a plurality of silicide grains which are discontinuously disposed in a direction substantially parallel with the surface of the semiconductor substrate, a silicon film continuously formed on the surface of the P-type silicon layer exposed on the discontinuous part of the silicide layer and on the surface of the silicide layer, a second metal nitride layer formed on the silicon film, and a metal layer formed on the metal nitride layer.
1. A semiconductor device comprising:
a semiconductor substrate having an N-channel transistor forming region and a P-channel transistor forming region;
a first gate electrode provided on the N-channel transistor forming region of the semiconductor substrate; and
a second gate electrode provided on the P-channel transistor forming region of the semiconductor substrate, wherein
the first gate electrode includes an N-type silicon layer containing N-type impurity, a first silicide layer formed on the N-type silicon layer, a first silicon film formed on the first silicide layer, a first metal nitride layer formed on the first silicon film, and a first metal layer formed on the first metal nitride layer, and
the second gate electrode includes a P-type silicon layer containing P-type impurity, a second silicide layer formed on the P-type silicon layer and having a plurality of silicide grains which are discontinuously disposed in a direction substantially parallel with the surface of the semiconductor substrate, a second silicon film continuously formed on the surface of the P-type silicon layer exposed on the discontinuous part of the second silicide layer and on the surface of the second silicide layer, a second metal nitride layer formed on the second silicon film, and a second metal layer formed on the second metal nitride layer.
2. The semiconductor device as claimed in claim 1 , wherein the first and the second silicon films are non-doped.
3. The semiconductor device as claimed in claim 1 , wherein the silicide layer, the metal nitride layer, and the metal layer contain the same refractory metal.
4. The semiconductor device as claimed in claim 2 , wherein the silicide layer, the metal nitride layer, and the metal layer contain the same refractory metal.
5. The semiconductor device as claimed in claim 3 , wherein the refractory metal is any one of tungsten (W), cobalt (Co), titanium (Ti), nickel (Ni), and tantalum (Ta).
6. The semiconductor device as claimed in claim 4 , wherein the refractory metal is any one of tungsten (W), cobalt (Co), titanium (Ti), nickel (Ni), and tantalum (Ta).
7. The semiconductor device as claimed in claim 1 , wherein the P-type impurity is boron (B).
8. The semiconductor device as claimed in claim 2 , wherein the P-type impurity is boron (B).
9. The semiconductor device as claimed in claim 3 , wherein the P-type impurity is boron (B).
10. The semiconductor device as claimed in claim 4 , wherein the P-type impurity is boron (B).
11. The semiconductor device as claimed in claim 5 , wherein the P-type impurity is boron (B).
12. The semiconductor device as claimed in claim 6 , wherein the P-type impurity is boron (B).