IP Library Granted Patent US 7,586,197
Granted Patent B2
US 7,586,197 · App. 11/474,918 · Granted Sep 8, 2009

Wire structure, method of forming wire, thin film transistor substrate, and method of manufacturing thin film transistor substrate

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Quick Facts
Patent No.
US 7,586,197
App. No.
11/474,918
Granted
Sep 8, 2009
Kind
B2
Abstract

Provided are a wire structure, a method of forming a wire, a thin film transistor (TFT) substrate, and a method of manufacturing the TFT substrate. The wire structure includes a barrier layer disposed on a lower structure, a copper conductive layer comprising copper or copper alloy disposed on the barrier layer, an intermediate layer comprising copper nitride disposed on the copper conductive layer, and a capping layer disposed on the intermediate layer.

Claims (11)

1. A thin film transistor (TFT) substrate comprising:

a gate wire disposed on an insulating substrate and comprising a gate line extending in a first direction and a gate electrode connected to the gate line;

a data wire insulated from the gate wire on the insulating substrate and comprising a data line extending in a second direction to intersect the gate line, a source electrode connected to the data line, and a drain electrode separated from the source electrode;

a passivation layer disposed on the data wire and having a contact hole exposing the drain electrode; and

a pixel electrode disposed on the passivation layer and connected to the drain electrode through the contact hole,

wherein the gate wire or the data wire has a barrier layer disposed on a lower structure, a copper conductive layer comprising copper or copper alloy disposed on the barrier layer, an intermediate layer comprising copper nitride disposed on the copper conductive layer, and a capping layer disposed on the intermediate layer, and

wherein the barrier layer, the copper conductive layer, the intermediate layer, and the capping layer have substantially the same pattern shape.

2. The TFT substrate of claim 1 , wherein the barrier layer comprises Cr, Ti, Ta, V, Zr, W, Nb, Co, Ni, Pd, Pt, or a compound thereof.

3. The TFT substrate of claim 1 , wherein the intermediate layer has a thickness in a range of about 50 to about 1,000 angstroms.

4. The TFT substrate of claim 1 , wherein the intermediate layer comprises about 0.001 to about 50 atomic percent of nitrogen.

5. The TFT substrate of claim 1 , wherein the capping layer comprises Mo, MoN, MoW, MeTi, MoNb, MoZr, IZO, ITO, amorphous ITO, or a compound thereof.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2012
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 029045/0860 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2006
From: LEE, JE-HUN; JEONG, CHANG-OH; CHO, BEOM-SEOK; BAE, YANG-HO
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 018031/0108 →