Semiconductor device and a method of manufacturing the same
View Patent ↗In a technique to improve the high-frequency power gain of an LDMOS, the distance from the surface of a passivation film covering electrode pads to the rear surface of a silicon substrate is set into 200 μm or less, or a trench of 2 μm or more in thickness, in which an insulating film or a conductor is embedded, is formed between a region where a p type impurity is diffused, when a p + type source penetrating layer is formed, and the channel region of a third LDMOS, so as to extend from the front surface of a semiconductor layer toward a silicon substrate. This trench restrains the p + type source penetrating layer from spreading to the channel region, thereby lowering the inductance or the resistance of the source and improving the high-frequency power gain.
1. A semiconductor device, comprising a laterally diffused field effect transistor which includes:
(a) a semiconductor layer of a first conductive type formed over a semiconductor substrate;
(b) a gate insulating film formed over the semiconductor layer;
(c) a gate electrode formed over the gate insulating film;
(d) a source comprised of a first semiconductor region of a second conductive type which is different from the first conductive type;
(e) a drain comprised of a second semiconductor region of the second conductive type having a first impurity concentration, and a third semiconductor region of the second conductive type having a higher second impurity concentration than the first impurity concentration and being formed at a position further from the gate electrode than the second semiconductor region;
(f) a fourth semiconductor region of the first conductive type where a channel region is formed;
(g) a sixth semiconductor region of the first conductive type formed in the semiconductor layer and being a region for connecting electrically the first semiconductor region and the semiconductor substrate to each other; and
(h) a trench formed between the first semiconductor region and the sixth semiconductor region so as to extend from the front surface of the semiconductor layer toward the semiconductor substrate,
wherein an insulating film is embedded in the trench.
2. The semiconductor device according to claim 1 , further comprising a source electrode pad for evaluation formed over the front surface of the semiconductor substrate and electrically connected to the semiconductor substrate.
3. The semiconductor device according to claim 1 , further comprising a drain electrode pad formed over the front surface of the semiconductor substrate and being electrically connected to the third semiconductor region, and a gate electrode pad electrically connected to the gate electrode.
4. The semiconductor device according to claim 1 , wherein the depth of the trench is 2 μm or more.
5. The semiconductor device according to claim 1 , wherein an electrically conductive film is embedded in the trench.
6. The semiconductor device according to claim 1 , wherein the trench is formed around the sixth semiconductor region.
7. The semiconductor device according to claim 1 , wherein the trench restrains the sixth semiconductor region from spreading to the channel region.