IP Library Granted Patent US 7,707,476
Granted Patent B2
US 7,707,476 · App. 11/476,686 · Granted Apr 27, 2010

Decoder device and decoding method and program

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Quick Facts
Patent No.
US 7,707,476
App. No.
11/476,686
Granted
Apr 27, 2010
Kind
B2
Abstract

A device and a method that improve decoding characteristics of an LDPC decoder to which SPA where the equation for the computation of messages is approximated and the number of messages are reduced is applied. A received LDPC code is decoded by repeating the passing of messages between a plurality of check nodes and a plurality of bit nodes corresponding to a check matrix, and messages sent from one of the check nodes to one of the bit nodes out of messages sent from the one of bit nodes to the one of check nodes are weighted at the one of bit nodes so that the longer ago the messages are computed at the one of check nodes, the less influential they become.

Claims (33)

1. A decoding device that decodes a received low density parity check code by repeating the passing of messages between a plurality of check nodes and a plurality of bit nodes corresponding to a low density parity check matrix, said decoding device comprising a weighting unit that weights at least one message sent from one of said check nodes to one of said bit nodes out of at least one message sent from said one of bit nodes to said one of check nodes.

2. The decoding device as defined in claim 1 comprising:

a controlling unit that controls a bit node to pass the same message or messages to all check nodes connected to said a bit node; wherein

said a bit node comprises a controlling unit that controls the ratio of a message or messages outputted by said one of check nodes within the entire messages sent to said one of check nodes to be smaller.

3. The decoding device as defined in claim 1 wherein the longer ago a message or messages are computed at said one of check nodes, the less influential said message or messages become.

4. The decoding device as defined in claim 1 wherein one of said bit nodes comprises:

a holding unit that holds a message or messages received from one of said check nodes, and a multiplier that multiplies said held message or messages by a weight of a positive number smaller than 1 every time said one of bit nodes receives message or messages from said one of check nodes thereafter followed by holding the multiplication result.

5. The decoding device as defined in claim 4 wherein upon receiving a message for the i th time, where i is a positive number not less than 2, from said check nodes, said bit nodes compute a message to be sent to one of said check nodes based on the multiplication of a message received from said one of said check nodes for the j th time, where j is an integer greater than or equal to 1, but less than i, by w (i-j) , where w is the weighted coefficient, and said message received for the i th time, where i is a positive number not less than 2.

6. A decoding device that decodes a received low density parity check code by repeating the passing of messages between a plurality of check nodes and a plurality of bit nodes corresponding to a low density parity check matrix, said decoding device comprising:

means for controlling a bit node to pass the same message to all check nodes connected to said a bit node, and

means for controlling the ratio of a message or messages outputted by a check node the same as said check node within the entire messages sent to said check node to be reduced.

7. A decoding method comprising:

decoding a received low density parity check code by repeating the passing of messages between a plurality of check nodes and a plurality of bit nodes corresponding to a low density parity check matrix; and

weighting at least one message sent from one of said check nodes to one of said bit nodes out of at least one message sent from said one of bit nodes to said one of check nodes.

8. The decoding method as defined in claim 7 wherein the longer ago a message is computed at said one of check nodes, the less influential said at least one message becomes.

9. The decoding method as defined in claim 7 wherein said one of bit nodes holds at least one message received from said one of check nodes, multiply said held message by a weight of a positive number smaller than 1 every time said one of bit nodes receives at least one message from said one of check nodes thereafter, and holds the multiplication result.

10. The decoding method as defined in claim 9 wherein upon receiving a message or messages for the i th time, where i is a positive number not less than 2, from said one of check nodes, said one of bit nodes computes a message or messages to be sent to said one of check nodes based on the multiplication of a message or messages received from said one of check nodes for the j th time, where j is an integer greater than or equal to 1, but less than i, by w (i-j) , where w is the weighted coefficient, and said message or messages received for the i th time, where i is a positive number not less than 2.

11. A computer-readable program stored in machine-readable medium, having a computer execute the following steps comprising:

decoding a received low density parity check code by repeating the passing of a message or messages between a plurality of check nodes and a plurality of bit nodes corresponding to a low density parity check matrix; and

weighting a message or messages sent from one of said check nodes to one of said bit nodes out of a message or messages sent from said one of bit nodes to said one of check nodes.

12. The program stored in machine-readable medium as defined in claim 11 comprising:

controlling a bit node to pass the same message to all check nodes connected to said a bit node.

13. The program stored in machine-readable medium as defined in claim 11 wherein said program executes a step that the longer ago a message or messages are computed at said one of check nodes, the less influential said message or messages become.

14. The program stored in machine-readable medium as defined in claim 11 wherein said program comprises a step that said one of bit nodes holds a message or messages received from said one of check nodes, and a step multiplying said held message or messages by a weight of a positive number smaller than 1 every time said one of bit nodes receives message or messages from said one of check nodes thereafter, followed by holding the multiplication result.

15. The program stored in machine-readable medium as defined in claim 14 wherein said program comprises a step of computing a message or messages to be sent to said one of check nodes upon receiving a message or messages for the i th time, where i is a positive number not less than 2, from said one of check nodes based on the multiplication of a message or messages received from said one of check nodes for the j th time, where j is an integer greater than or equal to 1, but less than i, by w (i-j) , where w is the weighted coefficient, and said message or messages received for the i th time, where i is a positive number not less than 2.

16. A decoding device that decodes a received low density parity check code by repeating the passing of messages between a plurality of check nodes and a plurality of bit nodes corresponding to a low density parity check matrix, said decoding device comprising a weighting unit that weights at least one message sent from one of said check nodes to one of said bit nodes out of at least one message sent from said one of bit nodes to said one of check nodes.

17. The decoding device as defined in claim 16 comprising:

a controlling unit that controls a bit node to pass the same message or messages to all check nodes connected to said a bit node; wherein

said a bit node comprises a controlling unit that controls the ratio of a message or messages outputted by said one of check nodes within the entire messages sent to said one of check nodes to be smaller.

18. The decoding device as defined in claim 16 wherein the longer ago a message or messages are computed at said one of check nodes, the less influential said message or messages become.

19. The decoding device as defined in claim 16 wherein one of said bit nodes comprises:

a holding unit that holds a message or messages received from one of said check nodes, and a multiplier that multiplies said held message or messages by a weight of a positive number smaller than 1 every time said one of bit nodes receives message or messages from said one of check nodes thereafter followed by holding the multiplication result.

20. The decoding device as defined in claim 19 wherein upon receiving a message for the i th time, where i is a positive number not less than 2, from said check nodes, said bit nodes compute a message to be sent to one of said check nodes based on the multiplication of a message received from said one of check nodes for the j th time, where j is an integer greater than or equal to 1, but less than i) by w (i-j) , where w is the weighted coefficient, and said message received for the i th time, where i is a positive number not less than 2.

Assignments (2)
CHANGE OF NAME Recorded Nov 4, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025311/0842 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 29, 2006
From: SEKI, KATSUTOSHI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 018024/0010 →