IP Library Granted Patent US 7,732,896
Granted Patent B2
US 7,732,896 · App. 11/480,428 · Granted Jun 8, 2010

Semiconductor apparatus and method of manufacturing the same

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Quick Facts
Patent No.
US 7,732,896
App. No.
11/480,428
Granted
Jun 8, 2010
Kind
B2
Abstract

A semiconductor apparatus comprises a plurality of transistor devices including a control terminal being inputted with a control signal and a first and a second terminals that a current flows therein according to the control signal, and a plurality of substrate conductive portions each formed in a region different from a region where the plurality of transistor devices are formed therein, wherein the transistor devices are connected to the substrate conductive portions, and each of the substrate conductive portion includes a semiconductor layer separated from other substrate conductive portions.

Claims (41)

1. A semiconductor apparatus, comprising:

a substrate;

a plurality of transistor devices formed on the substrate, each transistor device including a control terminal being inputted with a control signal and first and second terminals through which a current flows according to the control signal; and

a plurality of substrate conductive portions each formed in a region different from a region where the plurality of transistor devices are formed therein, each of the plurality of substrate conductive portions connecting the substrate through a ballast resistor,

wherein the plurality of transistor devices are connected to the plurality of substrate conductive portions,

wherein each of the plurality of substrate conductive portions includes a semiconductor layer separated from other substrate conductive portions by a Deep Trench Isolation device, and

wherein the semiconductor layer has a same conductivity type as the substrate.

2. The semiconductor apparatus according to claim 1 , wherein the plurality of substrate conductive portions comprise low resistance layers having resistances lower than the separated semiconductor layer.

3. The semiconductor apparatus according to claim 2 , wherein each of the low resistance layers is placed between each of the plurality of substrate conductive portions.

4. The semiconductor apparatus according to claim 3 , wherein the separated semiconductor layer is an upper layer with respect to said each of the low resistance layers.

5. The semiconductor apparatus according to claim 4 , wherein each of the plurality of substrate conductive portions comprises an electrode portion connected by the first terminal and a conductive layer, and

wherein each of the separated semiconductor layers contacts the electrode portion.

6. The semiconductor apparatus according to claim 5 , wherein the electrode portion comprises a polysilicon layer contacting each of the separated semiconductor layers.

7. The semiconductor apparatus according to claim 6 , wherein the electrode portion comprises an external electrode placed on the polysilicon layer, and

wherein an area at which the external electrode contacts the polysilicon layer is horizontally shifted with respect to an area at which the polysilicon layer contacts said each of said plurality of die substrate conductive portions.

8. The semiconductor apparatus according to claim 7 , wherein the semiconductor substrate is connected to ground.

9. The semiconductor apparatus according to claim 7 , wherein unit devices as a part of die semiconductor apparatus are multi-cell.

10. The semiconductor device according to claim 1 , wherein each of the plurality of substrate conductive portions comprises an electrode portion connected by the first terminal and a conductor layers, and

wherein each of the separated semiconductor layer contacts the electrode portion.

11. The semiconductor apparatus according to claim 10 , wherein the electrode portion comprises a polysilicon layer contacting each of the separated semiconductor layers.

12. The semiconductor apparatus according to claim 11 , wherein the electrode portion comprises an external electrode placed on the polysilicon layer, and

wherein art area at which the external electrode contacts the polysilicon layer is horizontally shifted with respect to an area at which the polysilicon layer contacts said each of said plurality of the substrate conductive portions.

13. The semiconductor apparatus according to claim 1 , wherein the semiconductor substrate is connected to ground.

14. The semiconductor apparatus according to claim 1 , wherein unit devices as a part of the semiconductor apparatus are multi-cell.

15. The semiconductor apparatus according to claim 1 ,

wherein

said plurality of transistor devices comprise bipolar transistor devices,

wherein the control terminal, the first terminal, and the second terminal are a base terminal, an emitter terminal, and a collector terminal, respectively, and

wherein the emitter terminal is connected to the substrate conductive portion.

16. The semiconductor apparatus according to claim 1 , wherein said semiconductor layer is other than being in direct contact with said substrate.

17. A semiconductor apparatus comprising:

a substrate;

a plurality of transistor devices formed on the substrate, each transistor device including a control terminal being inputted with a control signal and first and second terminals through which a current flows according to the control signal;

a plurality of substrate conductive portions each formed in a region different from a region where the plurality of transistor devices are formed therein, each of the plurality of substrate conductive portions connecting the substrate through a ballast resistor;

a plurality of polysilicon layers contacting the substrate conductive portions; and

external electrodes placed on the polysilicon layers,

wherein the plurality of transistor devices are connected to the different external electrodes, and

wherein an area at which the external electrode contacts the polysilicon layer is horizontally shifted with respect to an area at which the polysilicon layer contacts each of said plurality of the substrate conductive portions.

18. The semiconductor apparatus according to claim 17 , wherein the semiconductor substrate is connected to ground.

19. The semiconductor apparatus according to claim 17 , wherein unit devices as a part of the semiconductor apparatus are multi-cell.

20. The semiconductor apparatus according to claim 17 , wherein each of the plurality of substrate conductive portions includes a semiconductor layer separated from other substrate conductive portions by a Deep Trench Isolation device.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Nov 4, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025311/0842 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 5, 2006
From: HAYASI, KOUZI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 018041/0776 →