IP Library Granted Patent US 7,781,812
Granted Patent B2
US 7,781,812 · App. 11/480,906 · Granted Aug 24, 2010

Semiconductor device for non-volatile memory and method of manufacturing the same

Assignee: Fujitsu Semiconductor Limited
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Quick Facts
Patent No.
US 7,781,812
App. No.
11/480,906
Granted
Aug 24, 2010
Kind
B2
Abstract

After forming an interlayer insulating film ( 14 ) covering a ferroelectric capacitor, a hydrogen diffusion preventing film ( 18 ), an etching stopper ( 19 ) and an interlayer insulating film ( 20 ) are formed. Then, a wiring having a tantalum nitride (TaN) film ( 21 ) (barrier metal film) and a copper (Cu) film ( 22 ) is formed in the interlayer insulating film ( 20 ) by a single damascene method. Thereafter, a wiring having a copper film ( 29 ) and a wiring having a copper film ( 36 ) and the like are formed by a dual damascene method.

Claims (21)

1. A method of manufacturing a semiconductor device, comprising:

forming a ferroelectric capacitor above a semiconductor substrate;

forming a first interlayer insulating film covering said ferroelectric capacitor;

forming a first wiring connected to an electrode of said ferroelectric capacitor, not containing copper, in said first interlayer insulating film;

forming a hydrogen diffusion preventing film over said first interlayer insulating film and said first wiring;

forming an etching stopper film formed over said hydrogen diffusion preventing film;

forming a second interlayer insulating film directly on said etching stopper film so as to be in physical contact with said etching stopper film, wherein said second interlayer insulating film is a low dielectric film;

forming a groove in said second interlayer insulating film, said etching stopper film, and said hydrogen diffusion preventing film so as to expose a surface of said first wiring; and

forming a second wiring in the groove and embedded into said second interlayer insulating film, containing copper, and connected to said ferroelectric capacitor via said first wiring.

2. The method of manufacturing a semiconductor device according to claim 1 , wherein a film selected from a group consisting of an aluminum oxide film, an aluminum nitride film, a tantalum oxide film, a tantalum nitride film, a titanium oxide film, and a zirconium oxide film is formed as said hydrogen diffusion preventing film.

3. The method of manufacturing a semiconductor device according to claim 1 , wherein a silicon oxide nitride is formed as said second interlayer insulating film.

4. The method of manufacturing a semiconductor device according to claim 1 , further comprising the step of, before forming said ferroelectric capacitor, forming a transistor to which one of electrodes of said ferroelectric capacitor is connected on the surface of said semiconductor substrate.

5. The method of manufacturing a semiconductor device according to claim 4 , wherein said second wiring containing copper is connected to an electrode of said transistor.

6. The method of manufacturing a semiconductor device according to claim 1 , wherein said second wiring containing copper is connected to an electrode of said ferroelectric capacitor via a barrier metal film.

7. The method of manufacturing a semiconductor device according to claim 6 , wherein a film including a tantalum nitride film is formed as said barrier metal film.

8. The method of manufacturing a semiconductor device according to claim 1 , wherein a silicon nitride film is formed by a monocycle or double cycle plasma enhanced CVD method as said etching stopper film.

9. The method of manufacturing a semiconductor device according to claim 1 , further comprising the step of, between forming said first interlayer insulating film and forming said hydrogen diffusion preventing film, performing plasma treatment at 200° C. to 450° C. to said first wiring using gas containing at least either nitrogen or oxygen.

10. The method of manufacturing a semiconductor device according to claim 1 , further comprising the step of, between forming said hydrogen diffusion preventing film and forming said etching stopper film, performing plasma treatment at 200° C. to 450° C. to said hydrogen diffusion preventing film using gas containing at least either nitrogen or oxygen.

11. The method of manufacturing a semiconductor device according to claim 1 , further comprising the steps of, between forming said first interlayer insulating film and forming said hydrogen diffusion preventing film:

forming a plug connected to an electrode of said ferroelectric capacitor; and

performing annealing treatment at 400° C. to 600° C. in an atmosphere containing at least either nitrogen or oxygen.

Assignments (4)
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
CHANGE OF NAME Recorded Jul 16, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024696/0625 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021977/0219 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 6, 2006
From: IZUMI, KAZUTOSHI
To: FUJITSU LIMITED
Reel/Frame 018046/0773 →
Continuity (2)
Continuation PCTJP200400530200 · Apr 14, 2004
Related Publication 20060249768A1 · Nov 9, 2006