Phase-change semiconductor device and methods of manufacturing the same

1. A method of manufacturing a phase-change semiconductor device, comprising:

forming a metal layer pattern on a substrate, the metal layer pattern including an opening that exposes a portion of the substrate;

forming an etch stop layer on the metal layer pattern, a sidewall of the opening and the exposed portion of the substrate, the etch stop layer formed with a thickness less than an upper thickness threshold;

forming an oxide layer pattern on the etch stop layer to at least partially fill the opening;

forming an insulation layer on the etch stop layer and the oxide layer pattern;

forming a contact hole through the insulation layer and the etch stop layer to expose a portion of the metal layer pattern;

forming a contact electrode to fill the contact hole, the contact electrode being electrically connected to the metal layer pattern;

forming a phase-change layer on the insulation layer and the contact electrode;

forming an upper electrode layer on the phase-change layer; and

partially etching the upper electrode layer and the phase-change layer to form a phase-change layer pattern and an upper electrode.

2. The method of claim 1 , wherein the upper thickness threshold is about 3,000 Å.

3. The method of claim 1 , wherein forming the metal layer pattern includes:

forming a metal layer on the substrate;

forming a photoresist pattern on the metal layer, the photoresist pattern exposing a portion of the metal layer;

partially removing the metal layer using the photoresist pattern as an etching mask to form the metal layer pattern including the opening that exposes the portion of the substrate; and

reducing the photoresist pattern.

4. The method of claim 1 , wherein the etch stop layer includes at least one of silicon nitride, silicon oxynitride, and silicon-rich silicon oxide.

5. The method of claim 1 , wherein the etch stop layer includes silicon-rich silicon oxide having a content of silicon greater than that of the oxide layer pattern.

6. The method of claim 1 , wherein the etch stop layer has a thickness between about 100 Å to about 2,000 Å.

7. The method of claim 1 , wherein forming the oxide layer pattern includes:

forming an oxide layer to at least partially fill the opening and to cover the etch stop layer; and

performing a planarization process on the oxide layer until an upper face of the etch stop layer formed on the metal layer pattern is exposed.

8. The method of claim 1 , further comprising:

forming a spacer on a sidewall of the contact hole.

9. A method of manufacturing a phase-change semiconductor device, comprising:

forming a metal layer on a substrate;

forming an etch stop layer on the metal layer, the etch stop layer having a thickness less than an upper thickness threshold;

forming a photoresist pattern on the etch stop layer;

etching the etch stop layer and the metal layer using the photoresist pattern to form an etch stop layer pattern and a metal layer pattern on the substrate and to form an opening exposing a portion of the substrate;

reducing the photoresist pattern;

forming an oxide layer pattern to at least partially fill the opening;

forming an insulation layer on the etch stop layer pattern and the oxide layer pattern;

forming a contact hole through the insulation layer and the etch stop layer, the contact hole exposing a portion of the metal layer pattern;

forming a contact electrode to fill the contact hole, the contact electrode being electrically connected to the metal layer pattern;

forming a phase-change layer on the insulation layer, the phase-change layer being electrically connected to the contact electrode;

forming an upper electrode layer on the phase-change layer; and

partially etching the upper electrode layer and the phase-change layer to form a phase-change layer pattern and an upper electrode.

10. The method of claim 9 , wherein the etch stop layer includes at least one of silicon nitride, silicon oxynitride and silicon-rich silicon oxide.

11. The method of claim 9 , wherein the upper thickness threshold is about 3,000 Å.

12. The method of claim 9 , wherein the etch stop layer has a thickness between about 100 Å to about 2,000 Å.

13. The method of claim 9 , wherein forming the oxide layer pattern includes:

forming an oxide layer to fill the opening and to cover the etch stop layer; and

performing a planarization process on the oxide layer until an upper face of the etch stop layer is exposed.

14. The method of claim 9 , further comprising:

forming a spacer on a sidewall of the contact hole.