Systems and methods for DC offset correction in a direct conversion RF receiver
Systems and methods for DC offset correction in analog and digital direct conversion RF receivers. A time derivate and subsequent integration of in-phase and quadrature phase signal path components is performed to effectively remove DC offset from the resultant down converted baseband signal.
1. A direct conversion RF receiver comprising:
an RF antenna adapted to receive an RF signal;
a preselect filter adapted to filter the incoming RF signal;
a low noise amplifier adapted to amplify the received RF signal;
a local oscillator producing a local oscillation signal having a frequency tuned to that of the received RF signal;
a first RF mixer along an in-phase channel path adapted to multiply a received radio frequency signal with the local oscillation signal;
a second RF mixer along a quadrature-phase channel path adapted to multiply the received radio frequency signal with a 90° phase-shifted version of the local oscillation signal;
a first low pass filter filtering an output of the first mixer thereby outputting a downconverted in-phase signal I, centered at baseband;
a second low pass filter filtering an output of the second mixer thereby outputting a downconverted quadrature phase signal Q centered at baseband; and
a residual DC correction circuit adapted to perform a time derivative and subsequent integration of the I and Q signals, wherein the time derivative and subsequent integration comprise solving the following algebraic expressions:
Y i =X i −X i=1 ,
Z i =Y i +K·T s ·Z i−1
where K is a gain constant, T s is the sample time interval, X i is the signal stream, and Z i is the original signal less any constant terms.
2. The direct conversion receiver according to claim 1 , wherein the constant K·T s is in the range of 0.9 to 1.
3. The direct conversion receiver according to claim 1 , wherein the DC correction circuit comprises programmable logic adapted to perform a DC correction algorithm.
4. The direct conversion receiver according to claim 1 , wherein the DC correction circuit comprises a set of mathematical operations performed on a processor.
5. A method of reducing direct current offset in a direct conversion receiver comprising:
receiving an RF signal at the receiver;
subjecting the RF signal to a preselect filtering process;
splitting the resultant signal into parallel in-phase (I), and quadrature-phase (Q) signal paths;
demodulating the respective signals on the I and Q signal paths with mixers located on each signal path and connected to a local oscillator;
filtering the respective results of the demodulation with a low pass filter to yield downconverted I and Q components of the received RF signal;
taking a time derivative of each of the respective downconverted signals; and
integrating the results of each time derivative, wherein taking a time derivative of each of the respective mixed signals and integrating the results of each time derivative comprises successively solving the following algebraic expressions:
Y i =X i −X i=1 ,
Z i =Y i +K·T s ·Z i−1
where K is a gain constant, T s is the sample time interval, X i is the signal stream, and Z i is the original signal less any constant terms.
6. The method according to claim 5 , wherein the constant K·T s is in the range of 0.9 to 1.
7. A method of canceling DC offset in an RF receiver having a direct converter for direct down conversion of a received RF signal to a baseband signal, the method comprising:
taking a time derivative of signals in respective in-phase and quadrature-phase signal paths of the direct converter; and
integrating the results of the derivative to obtain the received signal without any constant offset value, wherein taking a time derivative of the each of the respective mixed signals and integrating the results of the time derivative comprises successively solving the following algebraic expressions:
Y i =X i −X i =1 ,
Z i =Y i +K·T s ·Z i−1
where K is again constant, T s is the sample time interval, X i is the signal stream, and Z i is the original signal less any constant terms.
8. The method according to claim 7 , wherein the constant K·T s is in the range of 0.9 to 1.
9. A DC offset reduction block for a direct conversion circuit of an RF receiver comprising:
circuitry adapted to take a time derivative of respective signals propagating through in-phase and quadrature phase signal paths of the direct conversion circuit; and
circuitry adapted to integrate the results of the differentiation, thereby yielding respective I and Q components devoid of constant offset values, wherein taking a time derivative of the each of the respective mixed signals and integrating the results of the time derivative comprisessuccessively solving the following algebraic expressions:
Y i =X i −X i=1 ,
Z i =Y i +K·T s ·Z i−1
where K is again constant, T s is the sample time interval, X i is the signal stream, and Z i is the original signal less any constant terms.
10. The DC offset reduction block according to claim 9 , wherein the constant K·T s is in the range of 0.9 to 1.
11. A direct conversion IF converter comprising:
an intermediate frequency, IF, filter adapted to filter the IF signal;
an IF amplifier adapted to amplify the IF signal;
a local oscillator producing a local oscillation signal having a frequency tuned to that of the IF signal;
a first IF mixer along an in-phase channel path adapted to multiply a received radio frequency signal with the local oscillation signal;
a second IF mixer along a quadrature-phase channel path adapted to multiply the received radio frequency signal with a 90° phase-shifted version of the local oscillation signal;
a first low pass filter filtering an output of the first mixer thereby outputting a downconverted in-phase signal I, centered at baseband;
a second low pass filter filtering an output of the second mixer thereby outputting a downconverted quadrature phase signal Q centered at baseband; and
a residual DC correction circuit adapted to perform a time derivative and subsequent integration of the I and Q signals, wherein the time derivative and subsequent integration comprise solving the following algebraic expressions:
Y i =X i −X i=1 ,
Z i =Y i +K·T s ·Z i−1
where K is a gain constant, T s is the sample time interval, X i is the signal stream, and Z i is the original signal less any constant terms.
12. The direct conversion IF converter according to claim 11 , wherein the constant K·T s is in the range of 0.9 to 1.
13. The direct conversion IF converter according to claim 11 , wherein the DC correction circuit comprises programmable logic adapted to perform a DC correction algorithm.
14. The direct conversion IF converter according to claim 11 , wherein the DC correction circuit comprises a set of mathematical operations performed on a processor.