IP Library Granted Patent US 7,727,873
Granted Patent B2
US 7,727,873 · App. 11/493,542 · Granted Jun 1, 2010

Production method of gallium nitride-based compound semiconductor multilayer structure

Assignee: Showa Denko K.K.
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Quick Facts
Patent No.
US 7,727,873
App. No.
11/493,542
Granted
Jun 1, 2010
Kind
B2
Abstract

An object of the present invention is to provide a method for producing a gallium nitride-based compound semiconductor multilayer structure useful for the production of a gallium nitride-based compound semiconductor light-emitting device which can ensure that the operating voltage is reduced, the light emission output is good and the light emission output is less changed due to aging. The inventive production method of a gallium nitride-based compound semiconductor multilayer structure comprises a substrate having thereon an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer, the light-emitting layer being disposed between the n-type semiconductor layer and the p-type semiconductor layer, and the light-emitting layer having a multiple quantum well structure formed by alternately stacking a well layer and a barrier layer, wherein at least one well layer has a non-uniform thickness, at least a part of the barrier layer is grown at a higher temperature than the well layer, and the temperature difference between each growth temperature of the well layer, the barrier layer and the p-type semiconductor layer is adjusted to be in a specific range.

Claims (27)

1. A method for producing a gallium nitride-based compound semiconductor multilayer structure comprising a substrate having thereon an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer, the light-emitting layer being disposed between the n-type semiconductor layer and the p-type semiconductor layer, and the light-emitting layer having a multiple quantum well structure formed by alternately stacking a well layer and a barrier layer, wherein at least one well layer has a non-uniform thickness, the barrier layer is grown through three steps of a same temperature as the well layer, a higher temperature than the well layer and a same temperature as the well layer, a temperature difference (T 2 −T 1 ) between a maximum growth temperature (T 2 ) of the barrier layer and a growth temperature (T 1 ) of the well layer is adjusted to be in a range from 160 to 200° C., and a temperature difference (T 3 −T 1 ) between a growth temperature (T 3 ) of the p-type semiconductor layer and the growth temperature (T 1 ) of the well layer is adjusted to be in a range from 240 to 280° C.

2. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 1 , wherein the barrier layer is grown at a growth rate of less than 10 Å/min.

3. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 1 , wherein the temperature difference (T 3 −T 2 ) between the growth temperature (T 3 ) of the p-type semiconductor layer and the maximum growth temperature (T 2 ) of the barrier layer is further adjusted to be in a range from 40 to 90° C.

4. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 1 , wherein the growth temperature (T 3 ) of the p-type semiconductor layer is adjusted to be in a range from 900 to 1,050° C.

5. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 1 , wherein the well layer closest to the p-type semiconductor layer has a uniform thickness.

6. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 1 , wherein the well layer closest to the n-type semiconductor layer has a uniform thickness.

7. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 1 , wherein the thickness of a well layer having a uniform thickness is 1.8 to 5 nm.

8. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 1 , wherein the thickness of a thin part of a well layer having a non-uniform thickness is not more than 2.7 nm.

9. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 1 , wherein the multiple quantum well structure comprises 3 to 10 stacks of the well layer and the barrier layer.

10. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 1 , wherein the barrier layer is a gallium nitride-based compound semiconductor selected from GaN, AlGaN and InGaN having a smaller In percentage than the InGaN forming the well layer.

11. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 10 , wherein the barrier layer is GaN.

12. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 1 , wherein the barrier layer contains a dopant.

13. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 12 , wherein the dopant is at least one selected from the group consisting of C, Si, Ge, Sn, Pb, O, S, Se, Te, Po, Be, Mg, Ca, Sr, Ba and Ra.

14. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 12 , wherein the concentration of the dopant is from 1×10 17 to 1×10 18 cm −3 .

15. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 1 , wherein the thickness of the barrier layer is from 7 to 50 nm.

16. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 15 , wherein the thickness of the barrier layer is at least 14 nm.

17. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 1 , wherein the well layer comprises In.

18. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 17 , wherein a thin layer containing no In is provided on at least the substrate side of the barrier layer.

19. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 1 , wherein after a well layer is formed, the layer thus formed is partly decomposed or sublimated to provide a non-uniform thickness.

20. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 19 , wherein the substrate temperature during decomposing or sublimating a part of the well layer is not lower than the substrate temperature during the forming of the well layer.

21. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 19 , wherein the decomposition or sublimation of a part of the well layer is conducted in an atmosphere containing a nitrogen source and containing no group III metal source.

22. The method for producing a gallium nitride-based compound semiconductor multilayer structure according to claim 19 , wherein the decomposition or sublimation of a part of the well layer is conducted during forming the barrier layer.

23. A gallium nitride-based compound semiconductor multilayer structure produced by the production method according to claim 1 .

24. A gallium nitride-based compound semiconductor light-emitting device fabricated by providing a negative electrode and a positive electrode on the n-type semiconductor layer and the p-type semiconductor layer of the gallium nitride-based compound semiconductor multilayer structure according to claim 23 , respectively.

25. A lamp comprising the gallium nitride-based compound semiconductor light-emitting device according to claim 24 .

26. An electronic machine incorporating the lamp according to claim 25 .

27. A machine incorporating the electronic machine according to claim 26 .

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2012
From: SHOWA DENKO KABUSHIKI KAISHA
To: TOYODA GOSEI CO., LTD.
Reel/Frame 029489/0249 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2006
From: SATO, HISAO; TAKEDA, HITOSHI
To: SHOWA DENKO K.K.
Reel/Frame 018248/0960 →
Priority Claims (2)
JP 2005-220839 · Jul 29, 2005 · national
JP 2005-339246 · Nov 24, 2005 · national
Continuity (3)
Provisional Application 6070601600 · Aug 8, 2005
Provisional Application 6074145900 · Dec 2, 2005
Related Publication 20070026551A1 · Feb 1, 2007