IP Library › Granted Patent US 7,939,349
Granted Patent B2
US 7,939,349 · App. 11/494,845 · Granted May 10, 2011

Nitride-based semiconductor light emitting device and manufacturing method thereof

Assignee: Sharp Kabushiki Kaisha
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Quick Facts
Patent No.
US 7,939,349
App. No.
11/494,845
Granted
May 10, 2011
Kind
B2
Abstract

The nitride-based semiconductor light-emitting device and manufacturing method thereof are disclosed: the nitride-based semiconductor light-emitting device includes a reflective layer formed on a support substrate, a p-type nitride-based semiconductor layer, a light-emitting layer and an n-type nitride-based semiconductor layer successively formed on the reflective layer, wherein irregularities are formed on a light extracting surface located above the n-type nitride-based semiconductor layer.

Claims (8)

1. A method of manufacturing a nitride-based semiconductor light-emitting device comprising:

providing a support substrate, a reflective layer, a p-type nitride-based semiconductor layer, a light-emitting layer, an n-type nitride-based semiconductor layer and an n-type In a Ga 1-a N (0≦a≦1) layer layered in this order, wherein the light-emitting layer, the n-type nitride-based semiconductor layer and the n-type In a Ga 1-a N (0≦a≦1) layer are formed using a growth substrate;

forming irregularities on a light extraction surface on an upper surface of said n-type In a Ga 1-a N(0≦a≦1) layer by removing the growth substrate; and

providing an n-type electrode on the upper surface of the n-type In a Ga 1-a N (0≦a≦1) layer;

wherein, the reflective layer is in ohmic contact with the p-type nitride-based semiconductor layer and functions as a p-type-use electrode; and

the p-type use electrode is a layer or a stack selected from a group consisting of a Pd layer, an Ag layer, a stack of a Pd layer and an Au layer, a stack of an Ag layer and an Au layer, and a stack of a Pd layer, an Ag layer and an Au layer.

2. The method according to claim 1 , wherein the n-type In a Ga 1-a N (0≦a≦1) layer is a silicon-doped nitride-based semiconductor layer.

3. The method according to claim 1 , wherein the support substrate comprises a nickel provided by nickel plating, a metal provided by metal plating, Au, an alloy of Au and Sn, or an electrically-conductive semiconductor.

Assignments (2)
NUNC PRO TUNC ASSIGNMENT Recorded Jul 19, 2020
From: SHARP KABUSHIKI KAISHA
To: LEDCOMM LLC
Reel/Frame 053247/0249 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2006
From: KOIDE, NORIKATSU; HATA, TOSHIO; FUDETA, MAYUKO; KIMURA, DAIGAKU
To: SHARP KABUSHIKI KAISHA
Reel/Frame 018140/0121 →
Priority Claims (1)
JP 2002-120576 · Apr 23, 2002 · national
Continuity (2)
Continuation 10422404 · Apr 23, 2003
Related Publication 20060267033A1 · Nov 30, 2006