IP Library Granted Patent US 7,436,224
Granted Patent B2
US 7,436,224 · App. 11/494,847 · Granted Oct 14, 2008

Low variation voltage output differential for differential drivers

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Quick Facts
Patent No.
US 7,436,224
App. No.
11/494,847
Granted
Oct 14, 2008
Kind
B2
Abstract

The methods and systems presented herein provide an improved means of correcting the variation of Voltage Output Differential (VOD) in differential drivers. In some embodiments, a high-precision reference voltage is generated not only based on a desired VOD, but also by monitoring the Voltage Common Mode (VCM) in a differential driver. In some embodiments, the VOD is then compared with the high-precision reference voltage to correct the output current. The result is a low-variation output voltage.

Claims (27)

1. A differential driver system comprising:

a reference voltage circuit that generates a reference voltage determined from a desired output voltage based on a common-mode voltage of the differential driver system;

a sampler voltage circuit that generates a sample voltage by monitoring an output voltage across two terminals of an external load resistor; and

a compensation circuit for controlling the output voltage at least in part by generating a compensation current based at least in part on the reference voltage and the sample voltage.

2. The differential driver system according to claim 1 , wherein the reference voltage is equal to the sum of the common-mode voltage and one-half of the desired output voltage.

3. The differential driver system according to claim 1 , wherein the reference voltage is equal to the common-mode voltage minus one-half of the desired output voltage.

4. The differential driver system according to claim 1 , wherein the sample voltage is equal to the sum of the common-mode voltage of the differential driver system and one-half of the output voltage.

5. The differential driver system according to claim 1 , wherein the sample voltage is equal to common-mode voltage of the differential driver system minus one-half of the output voltage.

6. The differential driver system according to claim 1 , wherein the compensation circuit compares the reference voltage with the sample voltage and sets the compensation current such that the output voltage is equal to a desired value.

7. A Multipoint Low Voltage Differential Signaling (MLVDS) system comprising:

a reference voltage circuit that generates a reference voltage determined from a desired output voltage based on a common-mode voltage of the MLVDS system;

a sampler voltage circuit that generates a sample voltage by monitoring an output voltage across two terminals of an external load resistor; and

a compensation circuit for controlling the output voltage at least in part by generating a compensation current based at least in part on the reference voltage and the sample voltage.

8. The MLVDS system according to claim 7 , wherein the reference voltage is equal to the sum of the common-mode voltage and one-half of the desired output voltage.

9. The MLVDS system according to claim 7 , wherein the reference voltage is equal to the common-mode voltage minus one-half of the desired output voltage.

10. The MLVDS system according to claim 7 , wherein the sample voltage is equal to the sum of the common-mode voltage of the MLVDS system and one-half of the output voltage.

11. The MLVDS system according to claim 7 , wherein the sample voltage is equal to the common-mode voltage of the MLVDS system minus one-half of the output voltage.

12. The MLVDS system according to claim 7 , wherein the compensation circuit compares the reference voltage with the sample voltage and sets the compensation current such that the output voltage is equal to a desired value.

13. A method of driving a differential line, comprising:

generating a reference voltage determined from a desired output voltage based on a common-mode voltage of the differential line;

generating a sample voltage by monitoring an output voltage across two terminals of an external load resistor; and

controlling the output voltage at least in part by generating a compensation current based at least in part on the reference voltage and the sample voltage.

14. The method according to claim 13 , wherein the reference voltage is equal to the sum of the common-mode voltage and one-half of the desired output voltage.

15. The method according to claim 13 , wherein the reference voltage is equal to the common-mode voltage minus one-half of the desired output voltage.

16. The method according to claim 13 , wherein the sample voltage is equal to the sum of the common-mode voltage of the deferential line and one-half of the output voltage.

17. The method to claim 13 , wherein the sample voltage is equal to the common-mode voltage of the deferential line minus one-half of the output voltage.

18. The method according to claim 13 , wherein the controlling step comprises comparing the reference voltage with the sample voltage and setting the compensation current such that the output voltage is equal to a desired value.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
SECURITY AGREEMENT Recorded Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION; CHIPX, INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2006
From: WANG, YANBO; WANG, HONGQUAN; DING, XUEXIN
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 018140/0112 →