Process for manufacturing epitaxial wafers for integrated devices on a common compound semiconductor III-V wafer
A method of fabricating an epitaxial compound semiconductor III-V wafer suitable for the subsequent fabrication of at least two different types of integrated active devices (such as an HBT and a FET) on such wafer by providing a substrate; growing a first epitaxial structure on the substrate; and growing a second epitaxial structure on the first epitaxial structure.
1. A method of fabricating an integrated III-V semiconductor structure in a reactor, the method comprising:
providing a first III-V semiconductor substrate in the reactor;
growing at least two epitaxial structures for different types of devices on the first substrate while the first substrate is in the reactor;
removing the first substrate from the reactor;
coating inner surfaces of the reactor to reduce the release of contaminants from those surfaces during subsequent process steps;
subsequently providing a second III-V semiconductor substrate in the reactor; and
growing at least two epitaxial structures for different types of devices on the second substrate while the second substrate is in the reactor.
2. The method of claim 1 wherein the coating comprises substantially the same material as the III-V semiconductor substrate.
3. The method of claim 2 wherein the coating is grown on the inner surfaces of the reactor in polycrystalline form.
4. The method of claim 2 wherein the coating comprises GaAs.
5. The method of claim 2 wherein the coating has a thickness of less than about 3 μm.
6. The method of claim 1 wherein coating a surface of the platter includes:
placing a semiconductor wafer on a platter in the reactor;
heating the platter;
growing an epitaxial layer to coat the inner surfaces of the reactor; and
removing the semiconductor wafer from the reactor.
7. A method of fabricating an integrated III-V semiconductor structure in a reactor in which a platter is used to hold wafers being processed, the method comprising:
coating a surface of the platter to reduce the release of contaminants from the platter surface during subsequent growth steps;
providing a III-V semiconductor substrate on the platter; and
growing at least two epitaxial structures for different types of devices on the substrate while the substrate is on the platter.
8. The method of claim 7 wherein the coating comprises substantially the same material as the III-V semiconductor substrate.
9. The method of claim 7 wherein the coating is grown on the platter in polycrystalline form.
10. The method of claim 7 wherein the coating comprises GaAs.
11. The method of claim 7 wherein the coating has a thickness of less than about 3 μm.
12. The method of claim 7 wherein coating a surface of the platter is performed between successive III-V semiconductor substrate processing runs.
13. The method of claim 7 wherein coating a surface of the platter includes:
placing at least one wafer on the platter;
heating the platter;
growing an epitaxial layer to coat the surface of the platter; and
removing the at least one wafer from the reactor.