Metal insulator semiconductor field effect transistor having fin structure

1. A semiconductor device comprising:

a fin-shaped semiconductor layer;

a gate electrode section formed in a widthwise direction of the semiconductor layer with a gate insulation film interposed therebetween, the gate electrode section including a plurality of electrode materials having different work functions and stacked one another, the plurality of electrode materials each being in direct and physical contact with the gate insulation film and the plurality of electrode materials facing a side of the fin-shaped semiconductor;

a channel section formed adjacent to the gate insulation film in the semiconductor layer; and

source and drain regions formed adjacent to the channel section.

2. The semiconductor device according to claim 1 , wherein said plurality of electrode materials include at least a first gate electrode and a second gate electrode formed on or above the first gate electrode, and the first gate electrode has a threshold value which is larger than that of the second gate electrode.

3. The semiconductor device according to claim 2 , wherein the semiconductor device is an N-channel metal oxide semiconductor field effect transistor, and the first gate electrode has a work function which is larger than that of the second gate electrode.

4. The semiconductor device according to claim 2 , wherein the semiconductor device is a P-channel metal oxide semiconductor field effect transistor, and the first gate electrode has a work function which is smaller than that of the second gate electrode.

5. The semiconductor device according to claim 2 , wherein the gate electrode section includes a third gate electrode between the first gate electrode and the second gate electrode, the third gate electrode having an intermediate work function between a work function of the first gate electrode and a work function of the second gate electrode.

6. The semiconductor device according to claim 1 , wherein the semiconductor layer is formed by selectively removing a surface area of a semiconductor substrate.

7. The semiconductor device according to claim 1 , wherein the semiconductor layer is selectively formed on a surface of a semiconductor substrate by selective epitaxial growth.

8. The semiconductor device according to claim 2 , wherein the second gate electrode is formed of a polysilicon film.

9. The semiconductor device according to claim 2 , wherein the first gate electrode is formed of a metal film.

10. The semiconductor device according to claim 2 , wherein the second gate electrode is formed of a polysilicon film, and the first gate electrode is formed of a metallized polysilicon film.

11. A semiconductor device comprising:

a semiconductor layer shaped like a fin;

first and second diffusion layers formed on sides of the semiconductor layer, between which a body section is formed; and

a gate electrode section which includes a plurality of electrode materials having different work functions and stacked one another, the plurality of electrode materials in the gate electrode section being provided to be adjacent to the body section with a gate insulation film interposed between the body section and the plurality of electrode materials, the plurality of electrode materials each being in direct and physical contact with the gate insulation film and the plurality of electrode materials facing a side of the body section.

12. The semiconductor device according to claim 11 , wherein the semiconductor layer is formed by selectively removing a surface area of a semiconductor substrate.

13. The semiconductor device according to claim 11 , wherein the semiconductor layer is selectively formed on a surface of a semiconductor substrate by selective epitaxial growth.

14. The semiconductor device according to claim 11 , wherein the gate electrode section includes at least a first gate electrode formed of a first electrode material having a first work function and a second gate electrode formed of a second electrode material having a second work function and stacked above the first gate electrode, and the first gate electrode has a threshold value which is larger than that of the second gate electrode.

15. The semiconductor device according to claim 14 , wherein the semiconductor device is an N-channel metal oxide semiconductor field effect transistor, and the first gate electrode has a work function which is larger than that of the second gate electrode.

16. The semiconductor device according to claim 14 , wherein the semiconductor device is a P-channel metal oxide semiconductor field effect transistor, and the first gate electrode has a work function which is smaller than that of the second gate electrode.

17. The semiconductor device according to claim 14 , wherein the second electrode material is a polysilicon film, and the first electrode material is a metal film.

18. The semiconductor device according to claim 14 , wherein the second electrode material is a polysilicon film, and the first electrode material is a metallized polysilicon film.

19. The semiconductor device according to claim 14 , wherein the gate electrode section includes a third gate electrode between the first gate electrode and the second gate electrode, and the third gate electrode is formed of a third electrode material having a third work function which is an intermediate work function between the first work function and the second work function.

20. The semiconductor device according to claim 2 , wherein an area of the second gate material facing the side of the fin-shaped semiconductor layer is greater than an area of the first gate material facing the side of the fin-shaped semiconductor layer.

21. The semiconductor device according to claim 14 , wherein an area of the second gate material facing the side of the body section is greater than an area of the first gate material facing the side of the body section.