Semiconductor device including a memory unit and a logic unit
View Patent ↗In a semiconductor device including a memory unit and a logic unit, a generation of a step in a terminal end surface of an electroconductive plug in a region above a capacitor element is inhibited. Such semiconductor device includes an insulating layer provided on the semiconductor substrate extending from the memory unit to the logic unit; a plurality of second interconnect connecting plugs embedded in the interlayer insulating film and the interlayer insulating film in the logic unit; capacitor elements embedded in the interlayer insulating film in memory unit; and dummy plugs, embedded in the interlayer insulating film and the interlayer insulating film in a region above a region that is provided with the capacitor element in the memory unit, and insulated from the capacitor element. A plurality of second interconnect connecting plugs and the dummy plug are terminated in the top surface of the interlayer insulating film.
1. A semiconductor device that includes a memory unit and a logic unit in a semiconductor substrate, comprising:
an insulating layer provided on said semiconductor substrate extending from said memory unit to said logic unit;
a plurality of electroconductive plugs embedded in said insulating layer in said logic unit;
a capacitor element embedded in said insulating layer in said memory unit; and
a dummy electrically conductive film, embedded in said insulating layer in a region above a region that is provided with said capacitor element in said memory unit, and insulated from said capacitor element,
wherein said plurality of electroconductive plugs and said dummy electrically conductive film are terminated in a top surface of said insulating layer.
2. The semiconductor device according to claim 1 , wherein
an insulating film is provided between said capacitor element and said dummy electrically conductive film.
3. The semiconductor device according to claim 2 , wherein said insulating film is provided to be separated from said capacitor element.
4. The semiconductor device according to claim 3 , wherein
said capacitor element includes a lower electrode, an upper electrode and a capacitive film provided between said lower electrode and said upper electrode, and wherein said semiconductor device further comprises an electroconductive upper electrode connecting plug, being provided to be separated from said insulating film and being connected to said upper electrode in the lower surface.
5. The semiconductor device according to claim 1 , wherein
said dummy electrically conductive film and said electroconductive plug are composed of substantially the same material, and wherein a top surface of said dummy electrically conductive film and a top surface of said electroconductive plug are terminated with substantially coplanar relationship.
6. The semiconductor device according to claim 1 , wherein
said logic unit further includes an interconnect, which is provided so as to contact with the top surface of said electroconductive plug, and wherein a material of said interconnect is different from a material of said dummy electrically conductive film.
7. The semiconductor device according to claim 1 , wherein
said memory unit further includes a bit line, and said capacitor element is provided above said bit line.