Chalcogenide switch with laser recrystallized diode isolation device and use thereof in three dimensional memory arrays
View Patent ↗A three-dimensional memory array formed of one or more two-dimensional memory arrays of one-time programmable memory elements arranged in horizontal layers and stacked vertically upon one another; and a two-dimensional memory array of reprogrammable phase change memory elements stacked on the one or more two-dimensional memory arrays as the top layer of the three-dimensional memory array.
1. A three-dimensional memory array comprising:
one or more two-dimensional memory arrays of one-time programmable memory elements arranged in horizontal layers and stacked vertically upon one another, said one-time programmable memory elements being irreversibly programmable from a first state to a second state; and
a two-dimensional memory array of reprogrammable phase change memory elements stacked on said one or more two-dimensional memory arrays of one-time programmable memory elements as the top memory layer of said three-dimensional memory array.
2. The three-dimensional memory array of claim 1 , wherein said reprogrammable phase change memory elements comprise non-volatile, chalcogenide-based, phase change memory material.
3. The three-dimensional memory array of claim 2 , wherein said non-volatile, chalcogenide-based, phase change memory material comprises a Ge—Te—Sb chalcogenide.
4. The three-dimensional memory array of claim 1 , wherein each of said reprogrammable phase change memory elements include at least one electrical isolation means.
5. The three-dimensional memory array of claim 4 , wherein said electrical isolation means comprises a diode.
6. The three-dimensional memory array of claim 5 , wherein said diode is a rapidly thermally annealed silicon diode.
7. The three-dimensional memory array of claim 6 , wherein said diode is a laser recrystallized silicon diode.
8. The three-dimensional memory array of claim 5 , wherein said diode includes a thin electrically insulating layer between the diode and its electrode or conductor.
9. The three-dimensional memory array of claim 5 , wherein said each of said reprogrammable phase change memory elements includes a thin electrically insulating breakdown layer between the phase change memory element and its electrode or conductor.
10. The three-dimensional memory array of claim 1 , wherein said one-time programmable memory elements comprise an anti-fuse.
11. The three-dimensional memory array of claim 10 , wherein said one-time programmable memory elements further include an electrical isolation means.
12. The three-dimensional memory array of claim 11 , wherein said electrical isolation means comprises a diode.
13. The three-dimensional memory array of claim 12 , wherein said diode is a rapidly thermally annealed silicon diode.
14. The three-dimensional memory array of claim 13 , wherein said diode is a laser recrystallized silicon diode.
15. The three-dimensional memory array of claim 1 , wherein said second state is more conductive than said first state.
16. The three-dimensional memory array of claim 1 , wherein said reprogrammable phase change memory elements are the only memory elements present in said top layer.