Phase change memory cell defined by a pattern shrink material process
One embodiment of the present invention provides a memory cell device. The memory cell device includes a first electrode, a phase-change material adjacent the first electrode, and a second electrode adjacent the phase-change material. The phase-change material has a sublithographic width defined by a pattern shrink material process.
1 . A memory cell device comprising:
a first electrode;
a phase-change material adjacent the first electrode, the phase-change material having a sublithographic width defined by a pattern shrink material process; and
a second electrode adjacent the phase-change material.
2 . The memory cell device of claim 1 , wherein the pattern shrink material process comprises a SAFIER™ material process.
3 . The memory cell device of claim 1 , wherein the pattern shrink material process comprises a RELACS™ material process.
4 . The memory cell device of claim 1 , wherein the phase-change material comprises a chalcogenide.
5 . The memory cell device of claim 1 , further comprising:
an isolation material adjacent the phase-change material.
6 . A memory cell device comprising:
a first electrode;
a heater adjacent the first electrode, the heater having a sublithographic width defined by a pattern shrink material process;
a phase-change material adjacent the heater; and
a second electrode adjacent the phase-change material.
7 . The memory cell device of claim 6 , wherein the pattern shrink material process comprises a SAFIER™ material process.
8 . The memory cell device of claim 6 , wherein the pattern shrink material process comprises a RELACS™ material process.
9 . The memory cell device of claim 6 , wherein the phase-change material comprises a chalcogenide.
10 . The memory cell device of claim 6 , further comprising:
an isolation material adjacent the heater.
11 . A memory device comprising:
a write pulse generator for generating a write pulse signal;
a sense amplifier for sensing a read signal;
a distribution circuit; and
a plurality of phase-change memory cells each capable of defining at least a first state and a second state, each memory cell further comprising phase-change material having a sublithographic width defined by a pattern shrink material process.
12 . The memory device of claim 11 , wherein the pattern shrink material process comprises a SAFIER™ material process.
13 . The memory device of claim 11 , wherein the pattern shrink material process comprises a RELACS™ material process.
14 . A memory device comprising:
a write pulse generator for generating a write pulse signal;
a sense amplifier for sensing a read signal;
a distribution circuit; and
a plurality of phase-change memory cells each capable of defining at least a first state and a second state, each memory cell further comprising a heater having a sublithographic width defined by a pattern shrink material process.
15 . The memory device of claim 14 , wherein the pattern shrink material process comprises a SAFIER™ material process.
16 . The memory device of claim 14 , wherein the pattern shrink material process comprises a RELACS™ material process.
17 - 38 . (canceled)
39 . The memory cell device of claim 1 , wherein the phase-change material is cylindrical in shape.
40 . The memory cell device of claim 6 , wherein the heater is cylindrical in shape.
41 . The memroy device of claim 11 , wherein the phase-change material of each memory cell is cylindrical in shape.
42 . The memory device of claim 14 , wherein the heater of each memory cell is cylindrical in shape.