Method for manufacturing semiconductor package
View Patent ↗A die for encapsulating an IC structural body having bonding wires with a molten resin is provided with at least one first half having an ejector-pin-through-hole and at least one second half coupled together to form a cavity therebetween. An ejector pin having a mirror-finished surface at a tip end thereof is inserted into the ejector-pin-through-hole and positioned at a position where a surface of the tip end of the ejector pin coincides with an intermediate surface height of a satin-finished surface formed on an upper inner wall of the cavity of the first half. The IC structural body is then encapsulated with a molten resin, and the mirror-finished surface of the ejector pin and the satin-finished surface of the upper inner wall surface of the cavity are stamped on the semiconductor package in substantially the same plane.
1. A method for manufacturing a semiconductor package, comprising:
preparing a die provided with at least one first half and at least one second half coupled together to form a cavity therebetween, said first half having a satin-finished inner surface and an ejector-pin-through-hole extending therethrough,
inserting an ejector pin having a mirror-finished surface at a tip end thereof into said ejector-pin-through-hole, positioning said ejector pin at a position where a surface of said tip end of said ejector pin coincides with an intermediate surface height of said satin-finished inner surface of said first half, and fixing said ejector pin at said position, and
embedding an IC structural body having a lead, an IC chip, and bonding wires bonded between the lead and the IC chip within a molten resin filled in said cavity, after said IC structural body is confined within said cavity.
2. A method for manufacturing a semiconductor package according to claim 1 , wherein during said embedding, said IC structural body is positioned at a position where said bonding wires are below said ejector pin.
3. A method for manufacturing a semiconductor package comprising:
preparing a die provided with at least one first half and at least one second half coupled together to form a cavity therebetween, said first half having a satin-finished inner surface and an ejector-pin-through-hole extending therethrough,
inserting an ejector pin having a mirror-finished surface at a tip end thereof into said ejector-pin-through-hole, positioning said ejector pin at a position where a surface of said tip end of said ejector pin coincides with an intermediate surface height of said satin-finished inner surface of said first half,
embedding an IC structural body having a lead, an IC chip, and bonding wires bonded between the lead and the IC chip within a molten resin filled in said cavity, after said IC structural body is confined within said cavity, and
releasing said IC structural body in said cavity from said die after said molten resin solidifies, using a spare pin inserted into a spare-pin-through-hole provided in said first half to project into said cavity.
4. A method for manufacturing a semiconductor package according to claim 1 , wherein said ejector pin includes a dish-shaped rib part and a rod-shaped core part integrated with said dish-shaped rib part, said mirror-finished surface on a tip end of said rod-shaped core part.
5. A method for manufacturing a semiconductor package having a mark-shaped and mirror-finished surface comprising:
preparing a die provided with at least one first half having an ejector-pin-through-hole extending therethrough and at least one second half coupled together with said first half to form a cavity therebetween,
inserting an elector pin having a mark-shaped and mirror-finished surface at a tip end thereof into said ejector-pin-through-hole, positioning said ejector pin at a position where the tip end of said ejector pin is substantially on a same plane as an upper inner wall surface of the cavity of said first half, and fixing said ejector pin at said position,
forming a satin-finished inner surface only on said upper inner wall surface of the cavity of said first half, and
embedding an IC structural body having a lead, an IC chip, and bonding wires bonded between the lead and the IC chip within a molten resin filled in said cavity, after said IC structural body is confined within said cavity.
6. A method for manufacturing a semiconductor package according to claim 5 , wherein during said embedding, said IC structural body is positioned at a position where the bonding wires are below said ejector pin.
7. A method for manufacturing a semiconductor package having a mark-shaped and mirror finished surface comprising:
preparing a die provided with at least one first half having an ejector-pin-through-hole extending therethrough and at least one second half coupled together with said first half to form a cavity therebetween,
inserting an ejector pin having a mark-shaped and mirror-finished surface at a tip end thereof into said ejector-pin-through-hole, positioning said ejector pin at a position where the tip end of said ejector pin is substantially on a same plane as an upper inner wall surface of the cavity of said first half,
forming a satin-finished inner surface only on said upper inner wall surface of the cavity of said first half,
embedding an IC structural body having a lead, an IC chip, and bonding wires bonded between the lead and the IC chip within a molten resin filled in said cavity, after said IC structural body is confined within said cavity, and
releasing said IC structural body in said cavity from said die after said molten resin solidifies, using a spare pin inserted into a spare-pin-through-hole provided in said first half to project into said cavity.
8. A method of manufacturing a semiconductor package according to claim 5 , wherein said ejector pin includes a dish-shaped rib part and a rod-shaped core part integrated with said dish-shaped rib part, said mirror-finished surface is on a tip end of said rod-shaped core part.
9. A method for manufacturing a semiconductor package according to claim 3 , wherein during said embedding, said IC structural body is positioned at a position where said bonding wires are below said ejector pin.
10. A method for manufacturing a semiconductor package according to claim 3 , wherein said ejector pin includes a dish-shaped rib part and a rod-shaped core part integrated with said dish-shaped rib part.
11. A method for manufacturing a semiconductor package according to claim 7 , wherein during said embedding, said IC structural body is positioned at a position where the bonding wires are below said ejector pin.
12. A method for manufacturing a semiconductor package according to claim 7 , wherein said ejector pin includes a dish-shaped rib part and a rod-shaped core part integrated with said dish-shaped rib part.