IP Library Granted Patent US 8,097,954
Granted Patent B2
US 8,097,954 · App. 11/508,289 · Granted Jan 17, 2012

Adhesive layer forming a capacitor dielectric between semiconductor chips

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Quick Facts
Patent No.
US 8,097,954
App. No.
11/508,289
Granted
Jan 17, 2012
Kind
B2
Abstract

A semiconductor device of the invention includes a substrate in which a power-supply electrode and a ground electrode are provided. A first semiconductor chip is disposed over the substrate and has a first conductor layer formed on a surface facing a second semiconductor chip. A second conductor layer is disposed over the first semiconductor chip and has a second conductor layer formed on a surface facing the first semiconductor chip. And an adhesive layer is disposed between the first conductor layer and the second conductor layer and bonds together the first semiconductor chip and the second semiconductor chip. In the semiconductor device, the adhesive layer and the first and second conductor layers function as a capacitor.

Claims (11)

1. A semiconductor device, comprising:

a supporting substrate;

a first semiconductor chip disposed over the supporting substrate via a first adhesive layer, the first semiconductor chip being bonded to the supporting substrate by the first adhesive layer;

a second semiconductor chip or dummy chip disposed over the first semiconductor chip via a second adhesive layer, the first semiconductor chip and the second semiconductor chip or dummy chip being bonded to each other by the second adhesive layer; and

a capacitor formed between the first semiconductor chip and the second semiconductor chip or dummy chip, the capacitor including the second adhesive layer used as a dielectric material, a first conductor layer formed on a surface of the first semiconductor chip as one of two mutually opposed electrodes, and a second conductor layer formed on a surface of the second semiconductor chip or dummy chip as the other of the two mutually opposed electrodes,

wherein the second adhesive layer is disposed between the first and second conductor layers of the capacitor, each of the second conductor layer and the second adhesive layer has an area which is substantially equal to an area of the second semiconductor chip or dummy chip, and the second adhesive layer fully fills a gap between the first and second conductor layers throughout the area of the second semiconductor chip or dummy chip.

2. The semiconductor device according to claim 1 wherein the one of the two mutually opposed electrodes of the capacitor is disposed on the surface of the first semiconductor chip over the supporting substrate, and the other of the two mutually opposed electrodes of the capacitor is disposed on the surface of the second semiconductor chip or dummy chip.

3. The semiconductor device according to claim 1 wherein the other of the two mutually opposed electrodes of the capacitor is disposed on the surface of the dummy chip over the supporting substrate, the one of the two mutually opposed electrodes of the capacitor is disposed on the surface of the first semiconductor chip, and the second adhesive layer is disposed between the dummy chip and the first semiconductor chip.

4. The semiconductor device according to claim 1 wherein the one of the two mutually opposed electrodes of the capacitor is electrically connected to one of a power supply electrode and a ground electrode in the semiconductor device, and the other of the two mutually opposed electrodes of the capacitor is electrically connected to the other of the power supply electrode and the ground electrode in the semiconductor device.

5. The semiconductor device according to claim 1 wherein the capacitor constitutes a decoupling capacitor in the semiconductor device.

6. The semiconductor device according to claim 1 wherein the second adhesive layer is made of a silicone resin or an epoxy resin.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2025
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 073964/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2024
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 069454/0333 →
MERGER Recorded May 24, 2023
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU LIMITED
Reel/Frame 064221/0545 →
CHANGE OF NAME AND CHANGE OF ADDRESS Recorded Jul 16, 2020
From: AIZU FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053481/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2020
From: FUJITSU SEMICONDUCTOR LIMITED
To: AIZU FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053209/0468 →
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
CHANGE OF NAME Recorded Jul 9, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024651/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021976/0089 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 23, 2006
From: OZAWA, KANAME; SATO, MITSUTAKA; YONEDA, YOSHIYUKI
To: FUJITSU LIMITED
Reel/Frame 018219/0014 →