Systems and methods of RF tower transmission, modulation, and amplification, including embodiments for compensating for waveform distortion
Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.
1. A method of at least one of power transmission, modulation, and amplification including output waveform distortion compensation, comprising:
receiving a frequency reference signal;
receiving an input signal;
generating a plurality of control signals from said received input signal;
generating a plurality of constant envelope signals using said frequency reference signal and said control signals;
amplifying and combining said constant envelope signals to create an output signal; and
reducing phase and amplitude errors in said output signal relative to a desired output signal, wherein said reducing phase and amplitude errors comprises at least one of:
adjusting a transfer function used to generate said plurality of control signals from said received input signal, wherein said transfer function transforms said received input signal into said plurality of control signals; and
adjusting offset voltages provided to vector modulation circuitry used to generate said plurality of constant envelope signals.
2. The method according to claim 1 , wherein said reducing phase and amplitude errors further comprises:
generating phase and amplitude error values in said output signal relative to said desired output signal.
3. The method according to claim 2 , wherein said step of generating phase and amplitude error values comprises one or more of:
measuring said phase and amplitude error values in said output signal relative to said desired output signal;
calculating, said phase and amplitude error values in said output signal relative: to said desired output signal; and
estimating said phase and amplitude error values in said output signal relative to said desired output signal.
4. The method according to claim 3 , wherein said reducing phase and amplitude errors further comprises pre-compensating for said estimated phase and amplitude error values in said output signal.
5. The method according to claim 3 , wherein said reducing phase and amplitude errors further comprises correcting for said measured/calculated phase and amplitude error values in said output signal.
6. The method according to claim 3 , wherein said reducing phase and amplitude errors further comprises at least one of pre-compensating for said estimated phase and amplitude error values in said output signal and correcting for said measured/calculated phase and amplitude error values in said output signal.
7. The method according to claim 1 , wherein said reducing phase and amplitude errors comprises reducing phase and amplitude errors in said output signal due to one or more of:
(a) circuitry process variations;
(b) circuitry temperature variations;
(c) IC package variations;
(d) circuit board variations;
(e) said step of generating a plurality of control signals;
(f) said step of generating a plurality of constant envelope signals;
(g) amplifying said constant envelope signals; and
(h) combining said amplified constant envelope signals at a single power amplifier node.
8. The method according to claim 7 , wherein phase and amplitude errors due to one or more of (a)-(h) are estimated at system manufacture time.
9. The method according to claim 7 , wherein phase and amplitude errors due to one or more of (a)-(h) are at least one of measured, calculated, and estimated during real-time system operation.
10. The method according to claim 7 , wherein phase and amplitude errors due to (f) are caused by vector modulation circuitry that performs said step of generating a plurality of constant envelope signals.
11. The method according to claim 7 , wherein phase and amplitude errors due to (g) are caused by gain and phase imbalances between power amplifier branches.
12. The method according to claim 1 , wherein said reducing phase and amplitude errors is performed when output waveform distortion of said output signal exceeds system design requirements.
13. The method according to claim 1 , wherein said reducing phase and amplitude errors is performed to ensure that phase and amplitude errors in said output signal remain within a specified system error tolerance.
14. The method according to claim 1 , wherein said reducing phase and amplitude errors further comprises pre-compensating for said phase and amplitude errors in said output signal relative to said desired output signal.
15. The method according to claim 1 , wherein said transfer function is implemented in a digital control module.
16. The method according to claim 1 , wherein said offset voltages comprise a gain balance control signal and a phase balance control signal.
17. The method according to claim 1 , wherein said reducing phase and amplitude errors further comprises applying error pre-compensation to said received input signal.
18. The method according to claim 17 , further comprising:
generating expected phase and amplitude error values in said output signal; and
adjusting said received input signal to correct for said expected phase and amplitude error values.
19. The method according to claim 18 , further comprising:
generating an error table or function, said error table or function defining expected phase and amplitude errors for a representative range of said received input signal.
20. The method according to claim 17 , wherein said step of generating expected phase and amplitude error values is performed during a system test and characterization process.
21. An apparatus for power transmission, modulation, and amplification, comprising:
input circuitry that receives an input signal, and that generates a plurality of control signals from said received input signal;
vector modulation circuitry, coupled to said input circuitry, that receives said control signals and a frequency reference signal, and that generates a plurality of constant envelope signals using said frequency reference signal and said control signals;
a power amplifier that receives said constant envelope signals and amplifies and combines said constant envelope signals to create an output signal; and
means for reducing phase and amplitude errors in said output signal relative to a desired output signal, wherein said means for reducing phase and amplitude errors comprises at least one of:
means for adjusting a transfer function of a digital control module of said input circuitry; and
means for adjusting offset voltages provided to said vector modulation circuitry.
22. The apparatus of claim 21 , wherein said means for reducing phase and amplitude errors further comprises:
means for generating phase and amplitude error values in said output signal relative to said desired output signal.
23. The apparatus of claim 22 , wherein said means for generating phase and amplitude error values comprises one or more of:
means for measuring said phase and amplitude error values in said output signal relative to said desired output signal;
means for calculating said phase and amplitude error values in said output signal relative to said desired output signal; and
means for estimating said phase and amplitude error values in said output signal relative to said desired output signal.
24. The apparatus of claim 23 , further comprising:
a feedforward error compensation module configured to pre-compensate for said estimated phase and amplitude error values in said output signal.
25. The apparatus of claim 23 , further comprising:
a feedback error compensation module configured to correct for said measured/calculated phase and amplitude error values in said output signal.
26. The apparatus of claim 23 , further comprising:
a hybrid feedforward/feedback error compensation module configured to compensate for said estimated phase and amplitude error values and to correct for said measured/calculated phase and amplitude error values.
27. The apparatus of claim 21 , wherein said means for reducing phase and amplitude errors comprises means for reducing phase and amplitude errors in said output signal due to one or more of:
(a) circuitry process variations;
(b) circuitry temperature variations;
(c) IC package variations;
(d) circuit board variations;
(e) said input circuitry;
(f) said vector modulation circuitry;
(g) said power amplifier;
(h) amplifying said constant envelope signals using said power amplifier; and
(i) combining outputs of said power amplifier at a single circuit node of said power amplifier.
28. The apparatus of claim 27 , further comprising:
means for estimating phase and amplitude errors due to one or more of (a)-(i), at system manufacture time.
29. The apparatus of claim 27 , further comprising:
means for at least one of measuring, calculating, and estimating phase and amplitude errors due to one or more of (a)-(i), during real-time system operation.
30. The apparatus of claim 27 , further comprising:
means for reducing gain and phase imbalances between branches of said power amplifier.
31. The apparatus of claim 21 , further comprising:
means for monitoring phase and amplitude errors in said output signal relative to said desired output signal; and
means for triggering said means for reducing phase and amplitude errors when said phase and amplitude errors exceed system design requirements.
32. The apparatus of claim 31 , wherein said means for monitoring phase and amplitude errors comprises differential branch phase and differential branch amplitude measurement circuitry.
33. The apparatus of claim 21 , wherein said means for reducing phase and amplitude errors further comprises means for pre-compensating for said phase and amplitude errors in said output signal relative to said desired output signal.
34. The apparatus of claim 21 , wherein said means for reducing phase and amplitude errors further comprises means for adjusting said control signals according to said phase and amplitude errors.
35. The apparatus of claim 21 , wherein said means for adjusting offset voltages provided to said vector modulation circuitry comprises means for applying a gain balance control signal and a phase balance control signal to said vector modulation circuitry.
36. The apparatus of claim 21 , wherein said means for reducing phase and amplitude errors further comprises means for pre-compensating said received input signal for said phase and amplitude errors.
37. The apparatus of claim 36 , wherein said means for pre-compensating said received input signal comprises:
means for generating expected phase and amplitude error values in said output signal; and
means for adjusting said received input signal to correct for said expected phase and amplitude error values.
38. The apparatus of claim 37 , wherein said means for pre-compensating said received input signal further comprises:
an error table or function, wherein said error table or function defines expected phase and amplitude errors for a representative range of said received input signal.