IP Library › Granted Patent US 7,368,987
Granted Patent B2
US 7,368,987 · App. 11/524,168 · Granted May 6, 2008

Circuit configuration having a feedback operational amplifier

Assignee: National Semiconductor Germany AG
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,368,987
App. No.
11/524,168
Granted
May 6, 2008
Kind
B2
Abstract

The present invention relates to a circuit configuration ( 10 ) having a feedback operational amplifier (AMP) for amplifying an input signal (Vin) input into the circuit arrangement ( 10 ) and outputting the amplified input signal as an output signal (Vout). In order to be able to change the circuit amplification (Vout/Vin) easily and reliably in the circuit configuration ( 10 ) and simultaneously keep an impairment of the output signal (Vout) caused by noise relatively low, capacitance values (Cb, C) of the coupling path ( 12 ) and of the feedback path ( 14 ) are adjusted simultaneously to one another correlated in a special way.

Claims (20)

1. A circuit configuration having a circuit input for an input signal (Vin) to be amplified and a circuit output to output the amplified input signal as an output signal (Vout),

the circuit configuration comprising an operational amplifier (AMP), whose amplifier input is impinged by the input signal (Vin) to be amplified and at whose amplifier output the amplified input signal (Vout) is provided,

the operational amplifier (AMP) being fed back using a feedback network ( 12 , 14 ) to define the circuit amplification,

and the feedback network ( 12 , 14 ) comprising a coupling path ( 12 ), which is situated between a circuit input terminal and an inverting amplifier input terminal, and a feedback path ( 14 ), which is situated between an amplifier output terminal and the inverting amplifier input terminal,

characterized in that the coupling path ( 12 ) comprises a coupling capacitor having a changeable capacitance value, referred to in the following as Cb, and the feedback path ( 14 ) comprises a feedback capacitor having a changeable capacitance value, referred to in the following as C, adjustment means being provided for simultaneously changing the two capacitance values Cb and C, so that the following relationship applies:

Cb=k a ( N+b x ) Cu and C =( c N−d x ) Cu,

k, a, b, c, and d identifying permanently predefined parameters,

Cu identifying a permanently predefined capacitance value,

N identifying a predefined natural number, and x identifying a natural number which may be changed in a range from 0 through N during the change.

2. The circuit configuration according to claim 1 , wherein the parameters a, b, c, and d at least approximately fulfill the following conditions: a=c and b=d=a−1.

3. The circuit configuration according to claim 2 , wherein the following relationship applies for the capacitance values Cb and C: Cb=2 N Cu+2 x Cu and C=N Cu+(N−x) Cu.

4. The circuit configuration according to claim 1 , wherein the coupling path ( 12 ) comprises multiple coupling branches connected in parallel to change Cb, each of which comprises a series circuit made of a transistor and a capacitor connectable and disconnectable via the transistor, whose capacitance values (2 Cu) are each permanently predefined.

5. The circuit configuration according to claim 1 , wherein the feedback path ( 14 ) comprises multiple feedback branches connected in parallel to change C, each of which comprises a series circuit made of a transistor and a capacitor connectable and disconnectable via the transistor, whose capacitance values (Cu) are each permanently predefined.

6. The circuit configuration according to claim 4 , wherein an integration element (INT 1 -INTN) is connected upstream of each of the control inputs of the transistors.

7. The circuit configuration according to claim 6 , wherein the integration element (INT 1 -INTN) is implemented as an integrator.

8. The circuit configuration according to claim 6 , wherein the integration elements (INT 1 -INTN) are impinged by digital switching signals (VD 1 -VDN).

9. The circuit configuration according to claim 6 , wherein at least one integration element (INT 1 -INTN) provided for the coupling path ( 12 ) is coupled to at least one integration element (INT 1 -INTN) provided for the feedback path ( 14 ) in such a way that a connection of the effective impedance (C 1 b , . . . CNb) in the coupling path ( 12 ) is connected to a disconnection of the affected impedance (C 1 , . . . CN) in the feedback path ( 14 ) and vice versa.

10. The circuit configuration according to claim 1 , wherein the coupling path ( 12 ) comprises a coupling branch, which is formed by a capacitance having a permanently predefined capacitance value (2 N Cu).

11. The circuit configuration according to claim 1 , wherein the feedback path ( 14 ) comprises a feedback branch, which is formed by a capacitor having a permanently predefined capacitance value (N Cu).

12. The circuit configuration according to claim 1 , wherein the feedback path ( 14 ) comprises a feedback branch which is formed by a resistor element (Rfb).

Assignments (2)
CHANGE OF NAME Recorded Oct 22, 2007
From: XIGNAL TECHNOLOGIES AG
To: NATIONAL SEMICONDUCTOR GERMANY AG
Reel/Frame 019991/0905 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2006
From: BLON, THOMAS
To: XIGNAL TECHNOLOGIES AG
Reel/Frame 018612/0968 →
Priority Claims (1)
DE 10 2005 047 171 · Sep 30, 2005 · national
Continuity (1)
Related Publication 20070075769A1 · Apr 5, 2007