IP Library Granted Patent US 7,827,324
Granted Patent B2
US 7,827,324 · App. 11/524,660 · Granted Nov 2, 2010

Method of handling flow control in daisy-chain protocols

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,827,324
App. No.
11/524,660
Granted
Nov 2, 2010
Kind
B2
Abstract

A system that includes a host and a peripheral device. The host transmits a packet that includes a command and a flow control field. The peripheral device receives the packet and has the ability to execute the command, wherein the peripheral device can determine whether the command can be processed in a timely manner, and can update the packet's flow control field with flow control data based on the determination. The host receives the updated packet and has the ability to adjust the flow control of subsequent packets to the peripheral device based on the flow control data in the updated packet.

Claims (34)

1. A system comprising:

a host integrated circuit, located on a printed circuit board, configured to transmit a packet, wherein the packet includes a command and a flow control field; and

a peripheral integrated circuit, the peripheral integrated circuit coupled to the host integrated circuit through traces on the printed circuit board, that receives the packet and has the ability to execute the command, wherein the peripheral integrated circuit can determine whether it is too congested to execute the command of the packet, update the packet with flow control data based on the determination, and transmit the updated packet to the host integrated circuit;

wherein the host integrated circuit receives the updated packet and has the ability to adjust the flow of subsequent packets to the peripheral integrated circuit based on the flow control data in the updated packet; and further

wherein the host integrated circuit and the peripheral integrated circuit communicate with each other using a single unidirectional path.

2. A method comprising:

receiving a packet transmitted by a host integrated circuit of a daisy-chain network, the daisy-chain network being coupled by traces on a circuit board, wherein the packet includes a command and a flow control field;

determining whether the command can be processed in a timely manner;

updating the packet's flow control field with flow control data based on the determination, wherein the flow control data is used to adjust a rate of subsequent packets provided to the daisy-chain network; and

transmitting the updated packet to the host integrated circuit further wherein

the daisy-chain network comprises a single unidirectional path.

3. The method of claim 2 , further comprising determining whether the flow control field has been updated with flow control data.

4. The method of claim 2 wherein updating the packet's flow control field with flow control data when a command queue is too congested to process the command in a timely manner.

5. A method comprising:

receiving in a host integrated circuit a packet from a peripheral integrated circuit coupled to the host integrated circuit by traces on a circuit board;

determining whether the packet includes flow control data in the flow control field; and

modifying the flow of subsequent data packets transmitted to the peripheral integrated circuit based on the determination; and further

wherein the host integrated circuit and the peripheral integrated circuit communicate with each other using a single unidirectional path.

6. A peripheral integrated circuit comprising:

means for receiving a packet transmitted by a host integrated circuit of a daisy-chain network coupled by traces on a circuit board, wherein the packet includes a command and a flow control field;

means for determining whether the command can be processed in a timely manner;

means for updating the packet's flow control field with flow control data based on the determination, wherein the flow control data is used to adjust a rate of subsequent packets provided to the daisy-chain network; and

means for transmitting the updated packet to the host integrated circuit further wherein

the daisy-chain network comprises a single unidirectional path.

7. A host integrated circuit comprising:

means for receiving in a host integrated circuit a packet from a peripheral integrated circuit coupled to the host integrated circuit by traces on a circuit board;

means for determining whether the packet includes flow control data in the flow control field; and

means for modifying the flow of subsequent data packets transmitted to the peripheral integrated circuit based on the determination; and further

wherein the host integrated circuit and the peripheral integrated circuit communicate with each other using a single unidirectional path.

8. A system comprising:

a host integrated circuit, located on a printed circuit board, configured to transmit a packet, wherein the packet includes a command and a flow control field; and

a plurality of peripheral integrated circuits, the peripheral integrated circuits coupled to the host integrated circuit through traces on the printed circuit board, that receive the packet and have the ability to execute the command, wherein the command requires that two or more peripheral integrated circuits assist in its execution; further wherein the peripheral integrated circuits can determine whether one of them is too congested to execute the command of the packet, update the packet with flow control data based on the determination, and transmit the updated packet to the host integrated circuit;

wherein the host integrated circuit receives the updated packet and has the ability to adjust the flow of subsequent packets to the plurality of peripheral integrated circuits based on the flow control data in the updated packet; and further

wherein the host integrated circuit and the plurality of peripheral integrated circuits communicate with each other using a single unidirectional path.

Assignments (2)
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
SECURITY AGREEMENT Recorded Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION; CHIPX, INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →