Granted Patent B2

US 7,250,787 · App. 11/526,839 · Granted Jul 31, 2007

Abstract

Claims (70)

1. A digital audio system on a chip (SOC) comprises:

a processing module;

random access memory for storing at least one of a program instruction and data;

read only memory for storing at least a portion of a boot algorithm;

interface operable to exchange a file with an external device;

an external memory interface operable to interface with a memory that stores at least one of a digital audio file and a digital video file;

at least one peripheral component interface;

a multimedia module operably coupled for at least one of:

providing an audio output from at least one of the digital audio file and the digital video file;

providing a video output from the digital video file;

receiving an audio input; and

receiving a video input;

a bus operably coupled to the processing module, the read only memory, the random access memory, the USB interface, the external memory interface, the at least one peripheral component interface, and the multimedia module; and

a plurality of general purpose input/output (GPIO) modules operably coupled to the bus, wherein each of the plurality of GPIO modules includes a plurality of GPIO cells, wherein a GPIO cell of the plurality of GPIO cells is coupled to a pin of the digital audio SOC, wherein a first GPIO module of the plurality of GPIO modules functions, in a first mode, as an input/output for system management and functions, in a second mode, as an output, and wherein a second GPIO module of the plurality of GPIO modules functions, in a first mode, as an I 2 C input/output, and functions, in a second mode, as an input/output.

2. The digital audio SOC of claim 1 , wherein the system management comprises at least one of:

bit manipulation;

debugging operations; and

encoding/decoding of data.

3. The digital audio SOC of claim 1 , wherein the second GPIO module further functions, in an external interrupt mode, as an external interrupt request input.

4. The digital audio SOC of claim 1 , wherein a third GPIO module of the plurality of GPIO modules functions, in a first mode, as a keyboard output and functions, in a second mode, as an input/output.

5. The digital audio SOC of claim 1 , wherein the at least one peripheral component interface comprises at least one of:

a CDROM drive, control buttons, switches, light emitting diode (LED) display, liquid crystal display (LCD) display, MMC/SC card, flash memory module, a RAM memory module, a two-wire interface module, hard drive, and a system packet interface module.

6. The digital audio SOC of claim 1 , wherein the GPIO cell comprises:

a register;

a first multiplexer;

a second multiplexer;

an output driver operably coupled to the pin, wherein, when the GPIO cell is in a first state, the register stores a first digital value that causes the first multiplexer to provide the output signal to the output driver and causes the second multiplexer to provide the output enable signal to the output driver, wherein when the output enable signal is activated, the output driver is active; and

a second register that stores the alternate output signal, wherein, when the GPIO cell is in a second state, the register stores a second digital value that causes the first multiplexer to provide the alternate output signal to the output driver and causes the second multiplexer to provide the output enable signal to the output driver.

7. The digital audio SOC of claim 6 , wherein the GPIO cell further comprises:

a third register that stores the alternate output enable signal, wherein, when the GPIO cell is in a third state, the register stores a third digital value that causes the first multiplexer to provide the output signal to the output driver and causes the second multiplexer to provide the alternate output enable signal to the output driver.

8. A digital audio system on a chip (SOC) comprises:

a processing module;

random access memory for storing at least one of a program instruction and data;

read only memory for storing at least a portion of a boot algorithm;

universal serial bus (USB) interface operable to exchange a file with an external device;

an external memory interface operable to interface with a memory that stores at least one of a digital audio file and a digital video file;

a plurality of peripheral component interfaces;

a multimedia module operably coupled for at least one of:

providing an audio output from at least one of the digital audio file and the digital video file;

providing a video output from the digital video file;

receiving an audio input; and

receiving a video input;

a bus operably coupled to the processing module, the read only memory, the random access memory, the USB interface, the external memory interface, the plurality of peripheral component interfaces, and the multimedia module; and

a plurality of general purpose input/output (GPIO) modules operably coupled to the bus, wherein each of the plurality of GPIO modules includes a plurality of GPIO cells, wherein a GPIO cell of the plurality of GPIO cells is coupled to a pin of the digital audio SOC, wherein a first GPIO module of the plurality of GPIO modules functions, in a first mode, as an input/output for system management and functions, in a second mode, as an output, and wherein a second GPIO module of the plurality of GPIO modules functions, in a first mode, as a keyboard output and functions, in a second mode, as an input/output.

9. The digital audio SOC of claim 8 , wherein the system management comprises at least one of:

bit manipulation;

debugging operations; and

encoding/decoding of data.

10. The digital audio SOC of claim 8 , wherein a third GPIO module of the plurality of GPIO modules functions, in a first mode, as an I 2 C input/output, and functions, in a second mode, as an input/output.

11. The digital audio SOC of claim 10 , wherein the third GPIO module further functions, in an external interrupt mode, as an external interrupt request input.

12. A digital audio system on a chip (SOC) comprises:

a processing module;

random access memory for storing at least one of a program instruction and data;

read only memory for storing at least a portion of a boot algorithm;

universal serial bus (USB) interface operable to exchange a file with an external device;

an external memory interface operable to interface with a memory that stores at least one of a digital audio file and a digital video file;

a plurality of peripheral component interfaces;

a multimedia module operably coupled for at least one of:

providing an audio output from at least one of the digital audio file and the digital video file;

providing a video output from the digital video file;

receiving an audio input; and

receiving a video input;

a bus operably coupled to the processing module, the read only memory, the random access memory, the USB interface, the external memory interface, the plurality of peripheral component interfaces, and the multimedia module; and

a plurality of general purpose input/output (GPIO) modules operably coupled to the bus, wherein each of the plurality of GPIO modules includes a plurality of GPIO cells, wherein a GPIO cell of the plurality of GPIO cells is coupled to a pin of the digital audio SOC, wherein a first GPIO module of the plurality of GPIO modules functions, in a first mode, as an I 2 C input/output, and functions, in a second mode, as an input/output, and wherein a second GPIO module of the plurality of GPIO modules functions, in a first mode, as a keyboard output and functions, in a second mode, as an input/output.

13. The digital audio SOC of claim 12 , wherein a third GPIO module of the plurality of GPIO modules functions, in a first mode, as an input/output for system management and functions, in a second mode, as an output.

14. The digital audio SOC of claim 13 , wherein the system management comprises at least one of:

bit manipulation;

debugging operations; and

encoding/decoding of data.

15. The digital audio SOC of claim 12 , wherein the first GPIO module further functions, in an external interrupt mode, as an external interrupt request input.

Assignments (6)