IP Library Patent Application 11526868
Patent Application
App. No. 11/526,868

Method of manufacturing silicon wafer

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Quick Facts
Patent No.
US None
App. No.
11/526,868
Abstract

In order to control a crystal defective area, to inhibit slip generation at the time of annealing treatment, and to manufacture a high quality silicon wafer of high strength with sufficient yields, a method of manufacturing a silicon wafer is provided in which a silicon single crystal is grown by way of Czochralski method under conditions where an oxygen concentration is 0.9×10 18 atoms/cm 3 or more and an oxidization induced stacking fault density is the maximum in an area within 20 mm of a wafer circumference, and an as-grown defect density of the wafer obtained by slicing the silicon single crystal is 1×10 7 /cm 3 or more over the whole region of the wafer.

Claims (13)

1 . A method of manufacturing a silicon wafer, wherein a silicon single crystal is grown under conditions where an oxygen concentration is 0.9×10 18 atoms/cm 3 or more and an oxidization induced stacking fault density is the maximum in an area within 20 mm of a wafer circumference, and an as-grown defect density in the wafer obtained by slicing said silicon single crystal is 1×10 7 /cm 3 or more over the whole region of the wafer.

2 . The method of manufacturing the silicon wafer as claimed in claim 1 , wherein the oxidization induced stacking faults exist up to the outermost circumference part of the wafer in the case of growing said silicon single crystal.

3 . The method of manufacturing the silicon wafer as claimed in claim 1 , wherein a ratio v/G between a crystal pulling speed v (mm/min) and a temperature gradient G (mm/° C.) in a crystal orientation at the outermost circumference is 0.190 (mm 2 /(min.° C.)) or more when growing said silicon single crystal.

4 . The method of manufacturing the silicon wafer as claimed in claim 1 , wherein after mirror finish said silicon wafer is subjected to heat treatment at a temperature of 1000-1200° C. in a hydrogen or inactive gas atmosphere.

5 . The method of manufacturing the silicon wafer as claimed in claim 4 , wherein said heat treatment is a hydrogen annealing treatment at a temperature of 1000-1200° C.

6 . The method of manufacturing the silicon wafer as claimed in claim 4 , wherein said heat treatment is a high temperature rapid acceleration Ar annealing treatment at a temperature of 1000-1200° C.

7 . A method of manufacturing a silicon wafer, comprising the steps of: growing a silicon single crystal by way of Czochralski method under conditions where an oxygen concentration is 0.9×10 18 atoms/cm 3 or more and an oxidization induced stacking fault density is the maximum in an area within 20 mm of a wafer circumference; mirror finishing the silicon wafer obtained by slicing said silicon single crystal; and heat treating said silicon wafer at a temperature of 1000-1200° C. in a hydrogen or inactive gas atmosphere, wherein an as-grown defect density is 1×10 7 /cm 3 or more over the whole region of the wafer.

8 . The method of manufacturing the silicon wafer as claimed in claim 7 , wherein the oxidization induced stacking faults exist up to the outermost circumference part of the wafer in the case of growing said silicon single crystal.

9 . The method of manufacturing the silicon wafer as claimed in claim 7 , wherein a ratio v/G between a crystal pulling speed v (mm/min) and a temperature gradient G (mm/° C.) in a crystal orientation at the outermost circumference is 0.190 (mm 2 /(min.° C.)) or more when growing said silicon single crystal.

10 . The method of manufacturing the silicon wafer as claimed in claim 7 , wherein said heat treatment is a hydrogen annealing treatment at a temperature of 1000-1200° C.

11 . The method of manufacturing the silicon wafer as claimed in claim 7 , wherein said heat treatment is a high temperature rapid acceleration Ar annealing treatment at a temperature of 1000-1200° C.

12 . The method of manufacturing the silicon wafer as claimed in claim 2 , wherein a ratio v/G between a crystal pulling speed v (mm/min) and a temperature gradient G (mm/° C.) in a crystal orientation at the outermost circumference is 0.190 (mm 2 /(min.° C.)) or more when growing said silicon single crystal.

13 . The method of manufacturing the silicon wafer as claimed in claim 8 , wherein a ratio v/G between a crystal pulling speed v (mm/min) and a temperature gradient G (mm/° C.) in a crystal orientation at the outermost circumference is 0.190 (mm 2 /(min.° C.)) or more when growing said silicon single crystal.

Assignments (2)
MERGER Recorded Jul 5, 2007
From: TOSHIBA CERAMICS CO., LTD.
To: COVALENT MATERIALS CORPORATION
Reel/Frame 019511/0735 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 27, 2006
From: IZUNOME, KOJI; HIRANO, YUMIKO; WATANABE, TAKASHI; KASHIMA, KAZUHIKO; SAITO, HIROYUKI; SENDA, TAKESHI
To: TOSHIBA CERAMICS CO., LTD.
Reel/Frame 018445/0790 →