Method of manufacturing semiconductor device from semiconductor wafer
View Patent ↗In a method of manufacturing a semiconductor device, a semiconductor wafer is provided. The wafer has semiconductor chip regions, a scribing line region and a predetermined region. A passivation layer is formed on the wafer. A photoresist film is formed on the passivation layer. A first pattern in a reticle is transferred to a first portion of the photoresist film above the scribing line region. The first pattern is transferred to a second portion of the photoresist film above the predetermined region. The photoresist film is developed. The passivation layer is etched using the photoresist film as a mask. The wafer is diced along the scribing line region to form semiconductor chips and a piece. Each of the semiconductor chips corresponds to each of chip regions. The piece group includes a piece which corresponds to the predetermined region.
1. A semiconductor wafer which includes a passivation layer, comprising:
a plurality of semiconductor chip regions each of which corresponds to each of a plurality of semiconductor chips;
a region of scribing lines along which said semiconductor wafer is cut when said semiconductor wafer is diced; and
an another region,
wherein a first opening and a second opening is formed in said passivation layer,
wherein said first opening is arranged in said region of scribing lines,
wherein a pattern of said first opening is identical to a pattern of said region of scribing lines,
wherein said second opening is arranged in said another region,
wherein a pattern of said second opening is identical to a portion of said pattern of said first opening,
wherein said another region is a region other than said region of said scribing lines, and
wherein said another region does not overlap with said region of said scribing lines.
2. The semiconductor wafer according to claim 1 , wherein said another region corresponds to a semiconductor chip, and
wherein said another region is arranged at a periphery of said semiconductor wafer.
3. The semiconductor wafer according to claim 1 , wherein said another region corresponds to a region other than a semiconductor chip.
4. The semiconductor wafer according to claim 1 , wherein a metal film underlying said passivation layer is exposed from said second opening.
5. The semiconductor wafer according to claim 1 , wherein said second pattern of said second opening is a cross pattern.
6. The semiconductor wafer according to claim 1 , wherein said second pattern of said second opening is an L-letter pattern.
7. The semiconductor wafer according to claim 1 , wherein said passivation layer defines a periphery of said first opening; and
wherein said passivation layer defines a periphery of said second opening.
8. The semiconductor wafer according to claim 1 , wherein a width of said pattern of said first opening is identical to a width of said pattern of said region of scribing lines.
9. The semiconductor wafer according to claim 1 , wherein said another region is a mirror chip region.
10. The semiconductor wafer according to claim 1 , wherein said another region comprises a semiconductor chip that is devoid of wiring patterns.
11. The semiconductor wafer according to claim 1 , wherein a width of said pattern of said second opening is identical to a width of said portion of said pattern of said first opening.