IP Library Granted Patent US 7,569,467
Granted Patent B2
US 7,569,467 · App. 11/543,791 · Granted Aug 4, 2009

Semiconductor device and manufacturing method thereof

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,569,467
App. No.
11/543,791
Granted
Aug 4, 2009
Kind
B2
Abstract

A semiconductor device has a multi-layer wiring in which resistance against migration of the semiconductor device is raised to improve the yield. Semiconductor device 100 includes a first interconnect (wiring) 112 , formed in a first interlayer insulating film 106 on a semiconductor substrate, not shown, a via 128 provided on the first interconnect (wiring) 112 so that the via is connected to the first interconnect (wiring) 112 , and a different element containing electrically conductive film 114 . The different element containing electrically conductive film is formed selectively on a site on the top of the first interconnect (wiring) 112 where the first wiring is contacted with the bottom of the via 128 . The different element containing electrically conductive film contains a metal of a main component of the first interconnect (wiring) 112 and a different element different from the metal of the main component.

Claims (31)

1. A semiconductor device comprising:

a semiconductor substrate;

a wiring provided in an insulating film formed on said semiconductor substrate and containing a first material as a main component, wherein said first material is a metal;

a via connecting plug formed above said wiring; and

a connecting portion selectively formed in an upper portion of said wiring and connected to the via connecting plug, said connecting portion comprising an electrically conductive film including a second material, different from said first material,

wherein said second material of said electrically conductive film contains said first material and a third material, where said third material is selected from the group consisting of at least one of silicon and a metal different from said first material, and

wherein said wiring is free from said second material.

2. The semiconductor device according to claim 1 , wherein said first material is copper.

3. The semiconductor device according to claim 1 , wherein said electrically conductive film is a silicide layer of said first material.

4. The semiconductor device according to claim 1 , wherein there is formed, in an area on the top of said wiring other than the area where said connecting portion has been formed, a film formed of a material different from the second material, and having a function of preventing diffusion of said first material.

5. A method for manufacturing a semiconductor device comprising:

forming a wiring on a semiconductor substrate, the wiring containing a first material as a main component, wherein the first material is a metal;

forming an insulating film covering said wiring;

selectively removing said insulating film to form a via hole reaching the upper surface of said wiring;

selectively forming a connecting portion in an upper portion of said wiring which is formed of an electrically conductive film containing said first material and a second material different from the first material, wherein said second material is selected from the group consisting of at least one of silicon and a third material, wherein said third material is a metal different from said first material, so as to provide said connecting portion in said upper surface portion of said wiring through said via hole; and

filling an inner space of said via hole with a metal material to form a via connecting plug to connect said wiring to said via connecting plug through said connecting portion,

wherein said wiring is free from said second material.

6. The method for manufacturing a semiconductor device according to claim 5 , wherein

in said forming said electrically conductive film, the exposed portion of the upper surface of said wiring is selectively silicided to form a layer of a silicide of said first material.

7. The method for manufacturing a semiconductor device according to claim 5 , wherein

the first material is copper; and

wherein in said forming said electrically conductive film, the exposed portion of an upper surface of said wiring is selectively silicided to form a copper silicide layer.

8. The method for manufacturing a semiconductor device according to claim 6 , wherein said forming said electrically conductive film includes:

directing a Si-containing gas to said exposed portion of the upper surface of said wiring.

9. The method for manufacturing a semiconductor device according to claim 6 , wherein said siliciding includes:

implanting Si on said exposed portion of an upper surface of said wiring; and

a heat-treatment step.

10. The method for manufacturing a semiconductor device according to claim 5 , wherein said insulating film forming includes:

forming a film of a material different from the second material of said electrically conductive film and having a function of preventing diffusion of said metal of the main component; and

forming an interlayer insulating film on said film having the diffusion preventive function;

said film having the diffusion preventive function and said interlayer insulating film being selectively removed in said via hole forming to form said via hole.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Nov 4, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025311/0851 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2006
From: KATOU, HIROAKI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 018386/0290 →