Fabrication method of semiconductor device
View Patent ↗Fabrication method of semiconductor device to reduce leak current at junction interface of p-type well and n-type well. The method includes forming a first trench portion by selective dry etching of a silicon substrate using a first etching gas and forming a second trench portion including an enlarged width portion downward from a bottom of the first trench portion by additional dry etching of a silicon substrate at the bottom of the first trench portion using a second etching gas. A mixture gas of a chlorine gas and a fluorocarbon gas is used as the second etching gas and also a bias voltage lower than that in the process to form the first trench portion are used in the process to form the second trench portion.
1. A fabrication method of a semiconductor device comprising:
forming a first trench portion by selective dry etching of a silicon substrate using a first etching gas and applying a bias voltage; and
forming a second trench portion including an enlarged width portion downward from a bottom of the first trench portion by additional dry etching of a silicon substrate at the bottom of the first trench portion using a second etching gas;
wherein a mixture gas of a chlorine gas and a fluorocarbon gas is used as the second etching gas, and
wherein said forming of the second trench portion is performed by a condition without applying the bias voltage.
2. The fabrication method of claim 1 , wherein the fluorocarbon gas is CF4.
3. The fabrication method of claim 1 , wherein said forming of the first trench portion and said forming of the second trench portion are performed in the same device.
4. The fabrication method of claim 1 , wherein said forming of the second trench portion is performed by isotropic dry etching of the silicon substrate.
5. A fabrication method of a semiconductor device comprising:
forming a first trench portion by selective dry etching of a silicon substrate using a first etching gas; and
forming a second trench portion including an enlarged width portion downward from the bottom of the first trench portion by additional dry etching of a silicon substrate at the bottom of the first trench using a second etching gas;
wherein a mixture gas of a chlorine gas and a fluorocarbon gas is used as the second etching gas and also a bias voltage lower than that in said forming of the first trench portion are used in forming the second trench portion; and
after said forming of the second trench portion, forming an insulating film by heat treatment after application of a coating liquid containing polysilazane to fill up the first trench portion and the second trench portion.