IP Library Granted Patent US 7,531,837
Granted Patent B2
US 7,531,837 · App. 11/559,489 · Granted May 12, 2009

Multi-channel thin film transistor structure

Assignee: Prime View International Co., Ltd.
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Quick Facts
Patent No.
US 7,531,837
App. No.
11/559,489
Granted
May 12, 2009
Kind
B2
Abstract

A multi-channel thin film transistor structure including a first conducting layer, an insulating layer, a semiconductor layer and a second conducting layer is provided. The first conducting layer formed on a substrate includes a gate electrode. The insulating layer covers the first conducting layer. The semiconductor layer formed on the insulating layer includes a plurality of semiconductor islands located above the gate electrode. The second conducting layer formed on the insulating layer and on the semiconductor layer includes a source electrode and a drain electrode. Each one of the semiconductor islands is coupled electrically with the source electrode at one end and coupled electrically with the drain electrode at the other end.

Claims (27)

1. A multi-channel thin film transistor comprising:

a single gate electrode for a thin film transistor, formed on a substrate;

an insulating layer, covering the single gate electrode;

a semiconductor layer, formed on the insulating layer, including a plurality of parallel semiconductor islands located above the single gate electrode together; and

a single source electrode and a single drain electrode for the thin film transistor, formed on the insulating layer and on the semiconductor layer,

wherein the single source electrode for the thin film transistor is coupled electrically with one end of all of the semiconductor islands, and the single drain electrode for the thin film transistor is coupled electrically with the other end of all of the semiconductor islands.

2. A multi-channel thin film transistor as recited in claim 1 , wherein the semiconductor layer is made of amorphous silicon.

3. A multi-channel thin film transistor as recited in claim 1 , wherein each one of the semiconductor islands has a channel width (W) and a channel length (L).

4. A multi-channel thin film transistor as recited in claim 3 , wherein the ratio of the channel width to the channel length (W/L) is about 7/4.

5. A multi-channel thin film transistor as recited in claim 3 , wherein the semiconductor islands are identical in channel length and different in channel width.

6. A multi-channel thin film transistor as recited in claim 1 , wherein the semiconductor layer includes a connection structure coupling the semiconductor islands electrically.

7. A multi-channel thin film transistor as recited in claim 1 , wherein one of the source/drain electrodes is U-shaped, the other electrode has a protrusion portion located in the U-shaped electrode and the semiconductor islands are formed between the protrusion portion and the U-shaped electrode.

8. A multi-channel thin film transistor as recited in claim 7 , wherein the semiconductor islands are formed two abreast.

9. A multi-channel thin film transistor comprising:

a light-shielding layer formed on a substrate;

a single source electrode and a single drain electrode for a thin film transistor, formed on the light-shielding layer;

a semiconductor layer, formed on the light-shielding layer and on the single source electrode and the single drain electrode, including a plurality of parallel semiconductor islands located above the single source electrode and the single drain electrode together;

an insulating layer, covering the semiconductor layer and the single source electrode and the single drain electrode; and

a single gate electrode for the thin film transistor, formed on the insulating layer, the single gate electrode located above all of the semiconductor islands;

wherein all of the semiconductor islands are coupled electrically with the single source electrode at one end and coupled electrically with the single drain electrode at the other end.

10. A multi-channel thin film transistor as recited in claim 9 , wherein each one of the semiconductor layer is made of amorphous silicon.

11. A multi-channel thin film transistor as recited in claim 9 , wherein each one of the semiconductor islands has a channel width (W) and a channel length (L).

12. A multi-channel thin film transistor as recited in claim 11 , wherein the ratio of the channel width to the channel length (W/L) is about 7/4.

13. A multi-channel thin film transistor as recited in claim 11 , wherein the semiconductor islands are identical in channel length and different in channel width.

14. A multi-channel thin film transistor as recited in claim 9 , wherein the semiconductor layer includes a connection structure coupling the semiconductor islands electrically.

15. A multi-channel thin film transistor as recited in claim 9 , wherein one of the source/drain electrodes is U-shaped, the other electrode has a protrusion portion located in the U-shaped electrode and the semiconductor islands are formed between the protrusion portion and the U-shaped electrode.

16. A multi-channel thin film transistor as recited in claim 15 , wherein the semiconductor islands are formed two abreast.

Assignments (2)
CHANGE OF NAME Recorded Jan 21, 2013
From: PRIME VIEW INTERNATIONAL CO., LTD.
To: E INK HOLDINGS INC.
Reel/Frame 029662/0453 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2006
From: LIU, CHUAN-FENG
To: PRIME VIEW INTERNATIONAL CO., LTD.
Reel/Frame 018516/0078 →
Priority Claims (1)
TW 95116147 A · May 5, 2006 · national
Continuity (1)
Related Publication 20070257260A1 · Nov 8, 2007